Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO₂ layer
DC Field | Value | Language |
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dc.contributor.author | Lee, Juhyun | - |
dc.contributor.author | Lee, Jeongsu | - |
dc.contributor.author | Ham, Giyul | - |
dc.contributor.author | Shin, Seokyoon | - |
dc.contributor.author | Park, Joohyun | - |
dc.contributor.author | Choi, Hyeongsu | - |
dc.contributor.author | Lee, Seungjin | - |
dc.contributor.author | Kim, Juyoung | - |
dc.contributor.author | Sul, Onejae | - |
dc.contributor.author | Lee, Seungbeck | - |
dc.contributor.author | Jeon, Hyeongtag | - |
dc.date.accessioned | 2021-07-30T05:04:47Z | - |
dc.date.available | 2021-07-30T05:04:47Z | - |
dc.date.created | 2021-05-12 | - |
dc.date.issued | 2017-02 | - |
dc.identifier.issn | 2158-3226 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/2775 | - |
dc.description.abstract | We report the effect of zirconium oxide (ZrO2) layers on the electrical characteristics of multilayered tin disulfide (SnS2) formed by atomic layer deposition (ALD) at low temperatures. SnS2 is a two-dimensional (2D) layered material which exhibits a promising electrical characteristics as a channel material for field-effect transistors (FETs) because of its high mobility, good on/off ratio and low temperature processability. In order to apply these 2D materials to large-scale and flexible electronics, it is essential to develop processes that are compatible with current electronic device manufacturing technology which should be conducted at low temperatures. Here, we deposited a crystalline SnS2 at 150 degrees C using ALD, and we then annealed at 300 degrees C. X-ray diffraction (XRD) and Raman spectroscopy measurements before and after the annealing showed that SnS2 had a hexagonal (001) peak at 14.9 degrees and A(1g) mode at 313 cm(-1). The annealed SnS2 exhibited clearly a layered structure confirmed by the high resolution transmission electron microscope (HRTEM) images. Back-gate FETs with SnS2 channel sandwiched by top and bottom ZrO2 on p(++) Si/SiO2 substrate were suggested to improve electrical characteristics. We used a bottom ZrO2 layer to increase adhesion between the channel and the substrate and a top ZrO2 layer to improve contact property, passivate surface, and protect from process-induced damages to the channel. ZTZ (ZrO2/SnS2/ZrO2) FETs showed improved electrical characteristics with an on/off ratio of from 0.39 x10(3) to 6.39 x10(3) and a mobility of from 0.0076 cm(2)/ Vs to 0.06 cm(2)/Vs. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | AMER INST PHYSICS | - |
dc.title | Improved electrical properties of atomic layer deposited tin disulfide at low temperatures using ZrO₂ layer | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Lee, Seungbeck | - |
dc.contributor.affiliatedAuthor | Jeon, Hyeongtag | - |
dc.identifier.doi | 10.1063/1.4977887 | - |
dc.identifier.scopusid | 2-s2.0-85013995258 | - |
dc.identifier.wosid | 000395898800061 | - |
dc.identifier.bibliographicCitation | AIP ADVANCES, v.7, no.2, pp.1 - 6 | - |
dc.relation.isPartOf | AIP ADVANCES | - |
dc.citation.title | AIP ADVANCES | - |
dc.citation.volume | 7 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 6 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | TRANSITION-METAL DICHALCOGENIDES | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | MOS2 TRANSISTORS | - |
dc.subject.keywordPlus | MONOLAYER | - |
dc.subject.keywordPlus | GRAPHENE | - |
dc.subject.keywordPlus | SNS2 | - |
dc.identifier.url | https://aip.scitation.org/doi/10.1063/1.4977887 | - |
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