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Effects of Vpass and Vertical Pitch on 3D SONOS NAND Falsh Memory Operations
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 이승백 | - |
| dc.date.accessioned | 2021-08-03T08:50:13Z | - |
| dc.date.available | 2021-08-03T08:50:13Z | - |
| dc.date.issued | 2014-10-27 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/42425 | - |
| dc.title | Effects of Vpass and Vertical Pitch on 3D SONOS NAND Falsh Memory Operations | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | The 14th Non-volatile memory technology symposium | - |
| dc.citation.conferencePlace | Jeju, Korea | - |
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- Lee, Seung Beck
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)