Modelling of Phase Change Memory(PCM) cell for Circuit Simulation
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kweon, Jun-Young | - |
dc.contributor.author | Song, Yun-Heup | - |
dc.contributor.author | Kim, Tony Tae-Hyoung | - |
dc.date.accessioned | 2021-07-30T05:22:57Z | - |
dc.date.available | 2021-07-30T05:22:57Z | - |
dc.date.created | 2021-05-11 | - |
dc.date.issued | 2019-10 | - |
dc.identifier.issn | 2163-9612 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/4524 | - |
dc.description.abstract | PRAMs with PCM and OTS have been reported and applied for the crossbar array structure. The characteristics of PCM and OTS have significant effects on the PRAM operation. This paper introduces a novel PCM, and OTS macro-model based on the physical mechanisms of them and CMOS based OTS operation mimicking circuitry for chip demonstration. PCM/OTS macro modelling allows designers to understand the device behaviour at developing of cell operating system and OTS mimicking circuitry helps test for demonstration chip evaluation. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Modelling of Phase Change Memory(PCM) cell for Circuit Simulation | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Song, Yun-Heup | - |
dc.identifier.doi | 10.1109/ISOCC47750.2019.9027691 | - |
dc.identifier.scopusid | 2-s2.0-85082985347 | - |
dc.identifier.wosid | 000694734600096 | - |
dc.identifier.bibliographicCitation | Proceedings - 2019 International SoC Design Conference, ISOCC 2019, pp.170 - 171 | - |
dc.relation.isPartOf | Proceedings - 2019 International SoC Design Conference, ISOCC 2019 | - |
dc.citation.title | Proceedings - 2019 International SoC Design Conference, ISOCC 2019 | - |
dc.citation.startPage | 170 | - |
dc.citation.endPage | 171 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Computer Science | - |
dc.relation.journalWebOfScienceCategory | Theory & Methods | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | Models | - |
dc.subject.keywordPlus | Phase change memory | - |
dc.subject.keywordPlus | Programmable logic controllers | - |
dc.subject.keywordPlus | Pulse code modulation | - |
dc.subject.keywordPlus | Timing circuits | - |
dc.subject.keywordPlus | Cell operating systems | - |
dc.subject.keywordPlus | Crossbar arrays | - |
dc.subject.keywordPlus | Macro model | - |
dc.subject.keywordPlus | Macro-modelling | - |
dc.subject.keywordPlus | Phase change memory (pcm) | - |
dc.subject.keywordPlus | Physical mechanism | - |
dc.subject.keywordPlus | PRAM | - |
dc.subject.keywordPlus | Circuit simulation | - |
dc.subject.keywordAuthor | Modelling | - |
dc.subject.keywordAuthor | OTS | - |
dc.subject.keywordAuthor | PCM | - |
dc.subject.keywordAuthor | PRAM | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9027691 | - |
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