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Future Technology Trend for Tera-bit Level Nonvolatile Memories : 3 Dimensional Nano-floating-gate Memory, Phase Change Memory, Resistive Memory, and Perpendicular STT-MRAM
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 박재근 | - |
| dc.date.accessioned | 2021-08-03T15:20:38Z | - |
| dc.date.available | 2021-08-03T15:20:38Z | - |
| dc.date.issued | 2012-05-10 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/51994 | - |
| dc.title | Future Technology Trend for Tera-bit Level Nonvolatile Memories : 3 Dimensional Nano-floating-gate Memory, Phase Change Memory, Resistive Memory, and Perpendicular STT-MRAM | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | 2012 SiWEDS Spring Meeting | - |
| dc.citation.conferencePlace | Sheraton Seattle Hotel, Seattle, USA | - |
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Collections - 서울 공과대학 > 서울 융합전자공학부 > 2. Conference Papers
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