Impact of processor cache memory on storage performance

Abstract

Recently flash memory provides high performance, high capacity, and stable quality of service (QoS). To satisfy these features, a complex Flash Translation Layer (FTL) algorithm is used, which greatly increases the amount of data processed by the processor. As a result, data traffic increases between processor and cache memory, resulting in more cache misses. Frequent cache misses cause cache miss penalty to degrade overall storage performance. In this paper, we analyze the effect of cache size on storage devices. As a result of verifying the performance on the FPGA board, when the cache size increased from 2KB to 16KB, the performance increase was 273.8% for random write, 214.4% for random read, 281.6% for sequential write, and 313.3% for sequential read.