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Bottom gate effec for 3D stackable Polycrystalline silicon channel Charge Trap Flash Memory
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 이승백 | - |
| dc.date.accessioned | 2021-08-03T19:22:38Z | - |
| dc.date.available | 2021-08-03T19:22:38Z | - |
| dc.date.issued | 2010-07-27 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/58102 | - |
| dc.title | Bottom gate effec for 3D stackable Polycrystalline silicon channel Charge Trap Flash Memory | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | 30th International Conference on the Physics of Semiconductors(ICPS2010) | - |
| dc.citation.conferencePlace | 서울 | - |
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- Lee, Seung Beck
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)