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Design of 32nm C-MOSFETs on Strained Layer-on-insulator and 30nm Cap-less DRAM on Si-on-insulator
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 박재근 | - |
| dc.date.accessioned | 2021-08-03T19:51:15Z | - |
| dc.date.available | 2021-08-03T19:51:15Z | - |
| dc.date.issued | 2010-04-29 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/58957 | - |
| dc.title | Design of 32nm C-MOSFETs on Strained Layer-on-insulator and 30nm Cap-less DRAM on Si-on-insulator | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | 2010 SiWEDS Sping Meeting | - |
| dc.citation.conferencePlace | Canada/Vancouver Fairmont Hotel Vancouver & Hyatt Regency Vancouver | - |
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