Lateral Growth of Ultrafine ZnO nanowires and Nanowires and Device Integration
DC Field | Value | Language |
---|---|---|
dc.contributor.author | 박원일 | - |
dc.date.accessioned | 2021-08-04T00:19:45Z | - |
dc.date.available | 2021-08-04T00:19:45Z | - |
dc.date.created | 2021-06-30 | - |
dc.date.issued | 2008-03-27 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/65313 | - |
dc.description.abstract | Semiconductor nanowires have been attracting a great research interest due to their excellent electrical and optical properties and the possibility that they may be used as building blocks of a wide range of nanodevices. However, most of researches have been focused in single-wire devices fabricated by deposition of nanowires on device substrates and subsequent nanowire registration step. The development of integrated electronic and photonic circuits, therefore, will require the strategy that can assemble these building blocks into desired location of substrates with high reproducibility and reliability. Here we introduce the simple approach for the patterned synthesis of ultrafine ZnO nanowires and direct integration of large numbers of device arrays into single substrates. The controlled synthesis based on metalorganic chemical vapor deposition resulted in selective growth of very thin ZnO nanowires at specific locations where nucleation can be initiated at an early stage of ZnO formation. In addition, an attractive force induced by a large van der Waals force between very thin nanowires and substrates leads to lateral elongation parallel to the substrate surface planes. After the synthesis, these nanowire patterns have been configured as field-effect transistor (FET) arrays by defining the metallic electrodes to the ends of nanowires on the growth wafers directly without the need of tedious pick-and-place of nanowires. By adopting appropriate nanowire growth and device geometry, approximately 70-90 % of the electrode pairs could be bridged with at least one of the nanowires. Significantly, transport studies have shown that most of nanowire bridges exhibit the considerable current flow as large as a few ?A/V, and individual devices can behave as high-performance FETs. The strategy concerning synthesis and fabrication process introduced here allows integrating large numbers of ZnO nanowire devices into single chips for realizing a wide range of integrated systems. In addition, the capability to fabricate these ultrafine wire devices opens up the opportunity for investigating fundamental transport studies of wide band-gap semiconductor nanostructures. | - |
dc.publisher | Materials Research Society | - |
dc.title | Lateral Growth of Ultrafine ZnO nanowires and Nanowires and Device Integration | - |
dc.type | Conference | - |
dc.contributor.affiliatedAuthor | 박원일 | - |
dc.identifier.bibliographicCitation | MRS spring meeting | - |
dc.relation.isPartOf | MRS spring meeting | - |
dc.citation.title | MRS spring meeting | - |
dc.citation.conferencePlace | San Francisco. CA | - |
dc.type.rims | CONF | - |
dc.description.journalClass | 1 | - |
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