Nanoscale Floating-Gate Memory using Self-Assembled NiSi2 Nanocrystals

Abstract

Recently, memory-cell structure using discrete traps as the charge storage media has received much attention as a promising candidate to replace conventional flash memory for future high speed and low power non-volatile memory devices1. To increase charge density per trap, metallic nanocrystals are being studied due to their higher density of states compared to Si nanocrystals. Nickel silicide is considered to be one of the most suitable materials for deep submicron, self-aligned silicide (salicide) applications because nickel silicide films have lower morphological and thermal instability.

In this study, we investigated the charge storage capability of self-assembled monolayer of NiSi2 nanocrystals embedded in SiO2 layers2. The NiSi2 films with thickness of few nanometers (from 3nm to 5nm) were deposited onto oxidized Si substrates using RF sputtering method. By subjecting the sputtered NiSi2 thin-film to rapid thermal annealing (RTA) a monolayer of NiSi2 nanocrystals were formed. The morphologies of the NiSi2 nanocrystals were characterized by scanning electron microscope (SEM) and atomic force microscope (AFM) for various RTA time durations (from 1 min to 5 min) at 800 °C in N2 ambient (Fig.1). The mean size and aerial density of the NiSi2 nanocrystals were ~18nm and 1x108/cm2, respectively. The capacitance-voltage (C-V) measurements were performed to study the electron charging and the discharging effects of the self-assembled monolayer of NiSi2 nanocrystals embedded in SiO2 (Fig.2). We observed a threshold voltage shift of more than 4 V when the bias voltage was swept between ±9 V. The gate oxide was 3 nm thick with a 20 nm control oxide deposited on top of the NiSi2 nanocrystal layer. The results clearly demonstrates that the self-assembled NiSi2 nanocrystals formed by RTA maybe applicable to future nanoscale-floating gate memory devices. Non-volatile memory operation using the self-assembled NiSi2 nanocrystals was also demonstrated. It can be seen in Fig.3, that a MOSFET with self-assembled NiSi2 embedded within the gate oxide shows hysteretic transfer characteristics with a threshold voltage difference of ~ 2 V. We will report on the memory operation of NiSi2 nanocrystal floating-gates and investigate layered NiSi2 as possible application to multi-level-cell memory structures.