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Submicron Patterning of Polydimethylsiloxane resists on electronic materials
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 안희준 | - |
| dc.date.accessioned | 2021-08-04T03:18:15Z | - |
| dc.date.available | 2021-08-04T03:18:15Z | - |
| dc.date.issued | 2006-05-31 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/70042 | - |
| dc.description.abstract | This report describes a novel technique for the fabrication of submicron-sized polydimethylsiloxane (PDMS) resist patterns on electronic material substrates using decal transfer lithography (DTL) in conjunction with reactive ion-beam etching (RIE). An O2/CF4 gas mixture is used to etch a supporting top-side PDMS thin-film in a closed-form decal to reveal conventional resist structures. These structures further provide an effective latent image that can, in turn, extend soft-lithography as a method of a form of multilayer lithography, one yielding microstructures similar to those obtained from the conventional photochemical methods used to prepare such resists. Specifically, the combined DTL/RIE patterning procedure was found to be compatible with commercially available planazation layers, and provides a direct means for preparing high aspect ratio resist features. This report further illustrates the applicability of this new form of soft-lithography for fabricating large area electronic devices, describing model silicon-based thin-film transistors fabricated using a silicon-on-insulator (SOI) wafer. | - |
| dc.title | Submicron Patterning of Polydimethylsiloxane resists on electronic materials | - |
| dc.type | Conference | - |
| dc.citation.conferenceName | International Fiber Conference 2006 | - |
| dc.citation.conferencePlace | 서울대학교 | - |
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