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Improving Write Performance Through Reliable Asynchronous Operation in Physically-Addressable SSD

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dc.contributor.authorLee, Daeyong-
dc.contributor.authorKwak, Jaewook-
dc.contributor.authorLee, Gyeongyong-
dc.contributor.authorJang, Moonseok-
dc.contributor.authorJeong, Joonyong-
dc.contributor.authorWang, Kexin-
dc.contributor.authorChoi, Jungwook-
dc.contributor.authorSong, Yong Ho-
dc.date.accessioned2021-08-02T07:30:59Z-
dc.date.available2021-08-02T07:30:59Z-
dc.date.created2021-05-11-
dc.date.issued2020-10-
dc.identifier.urihttps://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/7921-
dc.description.abstractPhysically-addressable solid-state drives (PASSDs) are secondary storage devices that provide a physical address-based interface for a host system to directly control NAND flash memory. PASSDs overcome the shortcomings such as latency variability, resource under-utilization, and log-on-log that are associated with legacy SSDs. However, in some operating environments, the write response time significantly increases because the PASSD reports the completion of a host write command synchronously (i.e., write-through) owing to reliability problems. It contrasts asynchronous processing (i.e., write-back), which reports a completion immediately after data are received in a high-performance volatile memory subsequently used as a write buffer to conceal the operation time of NAND flash memory. Herein, we propose a new scheme that guarantees write reliability to enable a reliable asynchronous write operation in PASSD. It is designed to use a large-granularity mapping table for minimizing the memory requirements and performing internal operations at an idle time to avoid response delays. Results demonstrate that the proposed PASSD reduces the average write response time by up to 88% and guarantees reliability without performance degradation.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleImproving Write Performance Through Reliable Asynchronous Operation in Physically-Addressable SSD-
dc.typeArticle-
dc.contributor.affiliatedAuthorChoi, Jungwook-
dc.contributor.affiliatedAuthorSong, Yong Ho-
dc.identifier.doi10.1109/ACCESS.2020.3033886-
dc.identifier.scopusid2-s2.0-85102883384-
dc.identifier.wosid000587847100001-
dc.identifier.bibliographicCitationIEEE ACCESS, v.8, pp.195528 - 195540-
dc.relation.isPartOfIEEE ACCESS-
dc.citation.titleIEEE ACCESS-
dc.citation.volume8-
dc.citation.startPage195528-
dc.citation.endPage195540-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessY-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryTelecommunications-
dc.subject.keywordPlusTRANSLATION LAYER-
dc.subject.keywordPlusFLASH-
dc.subject.keywordAuthorReliability-
dc.subject.keywordAuthorMemory management-
dc.subject.keywordAuthorTime factors-
dc.subject.keywordAuthorDegradation-
dc.subject.keywordAuthorWriting-
dc.subject.keywordAuthorFlash memories-
dc.subject.keywordAuthorDelays-
dc.subject.keywordAuthorFlash translation layer-
dc.subject.keywordAuthorNAND flash memory-
dc.subject.keywordAuthoropen-channel SSD-
dc.subject.keywordAuthorphysically-addressable SSD-
dc.subject.keywordAuthorsolid-state drive-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9239952-
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