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ECC Coprocessor Over a NIST Prime Field Using Fast Partial Montgomery Reduction
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Choi, Piljoo | - |
| dc.contributor.author | Lee, Mun-Kyu | - |
| dc.contributor.author | Kim, Dong Kyue | - |
| dc.date.accessioned | 2021-08-02T08:26:30Z | - |
| dc.date.available | 2021-08-02T08:26:30Z | - |
| dc.date.created | 2021-05-11 | - |
| dc.date.issued | 2021-03 | - |
| dc.identifier.issn | 1549-8328 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/7984 | - |
| dc.description.abstract | Montgomery reduction is a well-known optimization technique for modular reduction over prime fields. However, it has rarely been used for national institute of standards and technology (NIST) prime fields, because the special structure of NIST primes enables fast reduction that requires fewer computations than Montgomery reduction. In this study, we rediscover the Montgomery reduction for NIST primes and propose a new modular reduction method by applying partial modular reduction to Montgomery reduction. Using this new modular reduction method and other optimization techniques, such as pipelining and parallel processing, we propose an efficient elliptic curve cryptography (ECC) coprocessor over NIST prime fields. The implementation results indicate that the proposed coprocessor can perform one elliptic curve point multiplication in 0.055 ms with only 194.7 k gate counts. This is a considerably higher speed per area compared to previous research. | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
| dc.title | ECC Coprocessor Over a NIST Prime Field Using Fast Partial Montgomery Reduction | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Kim, Dong Kyue | - |
| dc.identifier.doi | 10.1109/TCSI.2020.3039753 | - |
| dc.identifier.scopusid | 2-s2.0-85098749634 | - |
| dc.identifier.wosid | 000617417200022 | - |
| dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.68, no.3, pp.1206 - 1216 | - |
| dc.relation.isPartOf | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
| dc.citation.title | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
| dc.citation.volume | 68 | - |
| dc.citation.number | 3 | - |
| dc.citation.startPage | 1206 | - |
| dc.citation.endPage | 1216 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.isOpenAccess | N | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | CURVE CRYPTOGRAPHIC PROCESSOR | - |
| dc.subject.keywordPlus | GF(P) | - |
| dc.subject.keywordAuthor | Elliptic curve cryptography (ECC) | - |
| dc.subject.keywordAuthor | finite field | - |
| dc.subject.keywordAuthor | Montgomery reduction | - |
| dc.subject.keywordAuthor | national institute of standards and technology (NIST) primes | - |
| dc.subject.keywordAuthor | partial modular reduction | - |
| dc.identifier.url | https://ieeexplore.ieee.org/document/9307240 | - |
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