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FA3C: FPGA-Accelerated Deep Reinforcement Learning

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dc.contributor.authorCho, Hyungmin-
dc.contributor.authorH.-
dc.contributor.authorOh-
dc.contributor.authorP.-
dc.contributor.authorPark-
dc.contributor.authorJ.-
dc.contributor.authorJung-
dc.contributor.authorW.-
dc.contributor.authorLee-
dc.contributor.authorJ.-
dc.date.available2021-03-17T08:00:41Z-
dc.date.created2021-02-26-
dc.date.issued2019-
dc.identifier.issn0000-0000-
dc.identifier.urihttps://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/12784-
dc.description.abstractDeep Reinforcement Learning (Deep RL) is applied to many areas where an agent learns how to interact with the environment to achieve a certain goal, such as video game plays and robot controls. Deep RL exploits a DNN to eliminate the need for handcrafted feature engineering that requires prior domain knowledge. The Asynchronous Advantage Actor-Critic (A3C) is one of the state-of-the-art Deep RL methods. In this paper, we present an FPGA-based A3C Deep RL platform, called FA3C. Traditionally, FPGA-based DNN accelerators have mainly focused on inference only by exploiting fixed-point arithmetic. Our platform targets both inference and training using single-precision floating-point arithmetic. We demonstrate the performance and energy efficiency of FA3C using multiple A3C agents that learn the control policies of six Atari 2600 games. Its performance is better than a high-end GPU-based platform (NVIDIA Tesla P100). FA3C achieves 27.9% better performance than that of a state-of-the-art GPU-based implementation. Moreover, the energy efficiency of FA3C is 1.62x better than that of the GPU-based implementation.-
dc.publisherASSOC COMPUTING MACHINERY-
dc.titleFA3C: FPGA-Accelerated Deep Reinforcement Learning-
dc.typeArticle-
dc.contributor.affiliatedAuthorCho, Hyungmin-
dc.identifier.doi10.1145/3297858.3304058-
dc.identifier.scopusid2-s2.0-85064698044-
dc.identifier.wosid000584356000036-
dc.identifier.bibliographicCitationInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, pp.499 - 513-
dc.relation.isPartOfInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS-
dc.citation.titleInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS-
dc.citation.startPage499-
dc.citation.endPage513-
dc.type.rimsART-
dc.type.docTypeProceedings Paper-
dc.description.journalClass1-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalWebOfScienceCategoryComputer Science, Hardware & Architecture-
dc.relation.journalWebOfScienceCategoryComputer Science, Software Engineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Theory & Methods-
dc.subject.keywordAuthorreinforcement learning-
dc.subject.keywordAuthordeep neural networks-
dc.subject.keywordAuthorFPGA-
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