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Impact of Microarchitectural Differences of RISC-V Processor Cores on Soft Error Effects (vol 6, pg 41302, 2018)

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dc.contributor.authorCho, Hyungmin-
dc.date.available2021-03-17T08:41:59Z-
dc.date.created2020-07-06-
dc.date.issued2019-
dc.identifier.issn2169-3536-
dc.identifier.urihttps://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/12988-
dc.description.abstractIn the above paper [1], the funding information should read 'This work was supported in part by the Hongik University New Faculty Research Support Fund, and in part by the National Research Foundation of Korea (NRF) grant funded by the Korean Government [Ministry of Science, ICT and Future Planning (MSIP)] under Grant NRF-2017R1C1B5017414.' © 2013 IEEE.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleImpact of Microarchitectural Differences of RISC-V Processor Cores on Soft Error Effects (vol 6, pg 41302, 2018)-
dc.typeArticle-
dc.contributor.affiliatedAuthorCho, Hyungmin-
dc.identifier.doi10.1109/ACCESS.2019.2904033-
dc.identifier.scopusid2-s2.0-85063868565-
dc.identifier.wosid000463449100001-
dc.identifier.bibliographicCitationIEEE ACCESS, v.7, pp.35034 - 35034-
dc.relation.isPartOfIEEE ACCESS-
dc.citation.titleIEEE ACCESS-
dc.citation.volume7-
dc.citation.startPage35034-
dc.citation.endPage35034-
dc.type.rimsART-
dc.type.docTypeCorrection-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalResearchAreaTelecommunications-
dc.relation.journalWebOfScienceCategoryComputer Science, Information Systems-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.relation.journalWebOfScienceCategoryTelecommunications-
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