Fault Demotion Using Reconfigurable Slack (FaDReS)
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Imran, Naveed | - |
dc.contributor.author | Lee, Jooheung | - |
dc.contributor.author | DeMara, Ronald F. | - |
dc.date.accessioned | 2021-11-11T03:44:47Z | - |
dc.date.available | 2021-11-11T03:44:47Z | - |
dc.date.created | 2021-11-10 | - |
dc.date.issued | 2013-07 | - |
dc.identifier.issn | 1063-8210 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/17099 | - |
dc.description.abstract | We propose an active dynamic redundancy-based fault-handling approach exploiting the partial dynamic reconfiguration capability of static random-access memory-based field-programmable gate arrays. Fault detection is accomplished in a uniplex hardware arrangement while an autonomous fault isolation scheme is employed, which neither requires test vectors nor suspends the computational throughput. The deterministic flow of the fault-handling scheme achieves an improved recovery in a bounded number of reconfigurations. This approach extends existing signal processing properties to accommodate fault handling, and is validated by implementing an H.263 video encoder discrete cosine transform (DCT) block. The peak signal-to-noise ratio measure of the video sequences indicates fault tolerance in the DCT block with only limited quality degradation, during the isolation and recovery phases spanning a few frames. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Fault Demotion Using Reconfigurable Slack (FaDReS) | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Lee, Jooheung | - |
dc.identifier.doi | 10.1109/TVLSI.2012.2206836 | - |
dc.identifier.scopusid | 2-s2.0-84880049709 | - |
dc.identifier.wosid | 000320946200021 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.21, no.7, pp.1364 - 1368 | - |
dc.relation.isPartOf | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - |
dc.citation.title | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | - |
dc.citation.volume | 21 | - |
dc.citation.number | 7 | - |
dc.citation.startPage | 1364 | - |
dc.citation.endPage | 1368 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordAuthor | Autonomous operation | - |
dc.subject.keywordAuthor | fault handling | - |
dc.subject.keywordAuthor | fault tolerance | - |
dc.subject.keywordAuthor | partial reconfiguration (PR) | - |
dc.subject.keywordAuthor | runtime faults | - |
dc.subject.keywordAuthor | survivability | - |
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