Two-Dimensional Analytical Model for Deriving the Threshold Voltage of a Short Channel Fully Depleted Cylindrical/Surrounding Gate MOSFET
DC Field | Value | Language |
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dc.contributor.author | Suh, Chung Ha | - |
dc.date.accessioned | 2021-12-15T02:43:07Z | - |
dc.date.available | 2021-12-15T02:43:07Z | - |
dc.date.created | 2021-12-10 | - |
dc.date.issued | 2011-06 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/19880 | - |
dc.description.abstract | A two-dimensional analytical model for deriving the threshold voltage of a short channel fully depleted (FD) cylindrical/surrounding gate MOSFET (CGT/SGT) is suggested. By taking into account the lateral variation of the surface potential, introducing the natural length expression, and using the Bessel functions of the first and the second kinds of order zero, we can derive potentials in the gate oxide layer and the silicon core fully two-dimensionally. Making use of these potentials, the minimum surface potential can be obtained to derive the threshold voltage as a closed-form expression in terms of various device parameters and applied voltages. Obtained results can be used to explain the drain-induced threshold voltage roll-off of a CGT/SGT in a unified manner. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.subject | TRANSISTOR FD-SGT | - |
dc.subject | FILM | - |
dc.title | Two-Dimensional Analytical Model for Deriving the Threshold Voltage of a Short Channel Fully Depleted Cylindrical/Surrounding Gate MOSFET | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Suh, Chung Ha | - |
dc.identifier.doi | 10.5573/JSTS.2011.11.2.111 | - |
dc.identifier.scopusid | 2-s2.0-79960222771 | - |
dc.identifier.wosid | 000301290200006 | - |
dc.identifier.bibliographicCitation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.11, no.2, pp.111 - 120 | - |
dc.relation.isPartOf | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.title | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.volume | 11 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 111 | - |
dc.citation.endPage | 120 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.identifier.kciid | ART001562307 | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.description.journalRegisteredClass | kci | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | TRANSISTOR FD-SGT | - |
dc.subject.keywordPlus | FILM | - |
dc.subject.keywordAuthor | Short channel cylindrical/surrounding gate MOSFET | - |
dc.subject.keywordAuthor | CGT/SGT | - |
dc.subject.keywordAuthor | natural length | - |
dc.subject.keywordAuthor | drain-induced threshold voltage roll-off | - |
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