Optimum source/drain overlap design for 16 nm high-k/metal gate MOSFETs
DC Field | Value | Language |
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dc.contributor.author | Jang, Junyong | - |
dc.contributor.author | Lim, Towoo | - |
dc.contributor.author | Kim, Youngmin | - |
dc.date.accessioned | 2022-01-03T05:42:11Z | - |
dc.date.available | 2022-01-03T05:42:11Z | - |
dc.date.created | 2021-12-28 | - |
dc.date.issued | 2009-10 | - |
dc.identifier.issn | 0268-1242 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/21788 | - |
dc.description.abstract | We explore a source/drain (S/D) design for a 16 nm MOSFET utilizing a replacement process for a high-k gate dielectric and metal gate electrode integration. Using TCAD simulation, a trade-off study between series resistance and overlap capacitance is carried out for a high-k dielectric surrounding gate structure, which results from the replacement process. An optimum S/D overlap to gate for the high-k surrounding gate structure is found to be different from the conventional gate structure, i.e. 0 similar to 1 nm underlap is preferred for the surround high-k gate structure while 1 similar to 2 nm overlap for the conventional gate one. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IOP PUBLISHING LTD | - |
dc.subject | DEVICE-SIMULATION | - |
dc.subject | GRADIENT | - |
dc.subject | MODEL | - |
dc.title | Optimum source/drain overlap design for 16 nm high-k/metal gate MOSFETs | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Youngmin | - |
dc.identifier.doi | 10.1088/0268-1242/24/10/105009 | - |
dc.identifier.wosid | 000270219600009 | - |
dc.identifier.bibliographicCitation | SEMICONDUCTOR SCIENCE AND TECHNOLOGY, v.24, no.10 | - |
dc.relation.isPartOf | SEMICONDUCTOR SCIENCE AND TECHNOLOGY | - |
dc.citation.title | SEMICONDUCTOR SCIENCE AND TECHNOLOGY | - |
dc.citation.volume | 24 | - |
dc.citation.number | 10 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | DEVICE-SIMULATION | - |
dc.subject.keywordPlus | GRADIENT | - |
dc.subject.keywordPlus | MODEL | - |
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