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비트 분할 데이터 시프트 및 다양한 형식 변환이 가능한 데이터 처리기의 VLSI 설계
Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 유재희 | - |
| dc.date.accessioned | 2022-04-11T02:45:31Z | - |
| dc.date.available | 2022-04-11T02:45:31Z | - |
| dc.date.created | 2022-04-11 | - |
| dc.date.issued | 2002 | - |
| dc.identifier.issn | 1226-4717 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/27018 | - |
| dc.publisher | 한국통신학회 | - |
| dc.title | 비트 분할 데이터 시프트 및 다양한 형식 변환이 가능한 데이터 처리기의 VLSI 설계 | - |
| dc.title.alternative | VLSI Design of Data Manipulation Unit capable of bit partitioned shifts and various data type conversions | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | 유재희 | - |
| dc.identifier.bibliographicCitation | 한국통신학회논문지C, v.27, no.6, pp.594 - 600 | - |
| dc.relation.isPartOf | 한국통신학회논문지C | - |
| dc.citation.title | 한국통신학회논문지C | - |
| dc.citation.volume | 27 | - |
| dc.citation.number | 6 | - |
| dc.citation.startPage | 594 | - |
| dc.citation.endPage | 600 | - |
| dc.type.rims | ART | - |
| dc.identifier.kciid | ART000906729 | - |
| dc.description.journalClass | 2 | - |
| dc.description.journalRegisteredClass | kci | - |
| dc.description.journalRegisteredClass | other | - |
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Related Researcher
- You, Jae hee
- Engineering (Electronic & Electrical Engineering)