A fault-tolerant architecture for symmetric block ciphers
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Joo, MK | - |
dc.contributor.author | Kim, JH | - |
dc.contributor.author | Choi, YH | - |
dc.date.accessioned | 2022-05-23T08:49:49Z | - |
dc.date.available | 2022-05-23T08:49:49Z | - |
dc.date.created | 2022-05-23 | - |
dc.date.issued | 2002 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/28006 | - |
dc.description.abstract | Secure transmission over wireline/wireless networks requires encryption of data and control information. For high-speed data transmission, it would be desirable to implement the encryption algorithms in hardware. Faults in the hardware, however, may cause interruption of service and side-channel attacks. This paper presents a simple technique for achieving fault tolerance in pipelined implementation of symmetric block ciphers. It detects errors, locates the corresponding faults, and readily reconfigures during normal operation to isolate the identified faulty modules. Bypass links with some extra pipeline stages are used to achieve fault tolerance. The hardware overhead can be controlled by properly choosing the number of extra stages. Moreover, fault tolerance is achieved with negligible time overhead. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEE COMPUTER SOC | - |
dc.title | A fault-tolerant architecture for symmetric block ciphers | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Choi, YH | - |
dc.identifier.doi | 10.1109/ATS.2002.1181713 | - |
dc.identifier.wosid | 000179973300036 | - |
dc.identifier.bibliographicCitation | PROCEEDINGS OF THE 11TH ASIAN TEST SYMPOSIUM (ATS 02), pp.212 - 217 | - |
dc.relation.isPartOf | PROCEEDINGS OF THE 11TH ASIAN TEST SYMPOSIUM (ATS 02) | - |
dc.citation.title | PROCEEDINGS OF THE 11TH ASIAN TEST SYMPOSIUM (ATS 02) | - |
dc.citation.startPage | 212 | - |
dc.citation.endPage | 217 | - |
dc.type.rims | ART | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 3 | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Software Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
94, Wausan-ro, Mapo-gu, Seoul, 04066, Korea02-320-1314
COPYRIGHT 2020 HONGIK UNIVERSITY. ALL RIGHTS RESERVED.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.