Bump formation and flip chip processes for RF system-on-packages
DC Field | Value | Language |
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dc.contributor.author | Jung, Boo-Yang | - |
dc.contributor.author | Choi, Eun-Kyoung | - |
dc.contributor.author | Jeon, Young-Soo | - |
dc.contributor.author | Lee, Kwang-Yong | - |
dc.contributor.author | Seo, Kwang-Seok | - |
dc.contributor.author | Oh, Tae-Sung | - |
dc.date.accessioned | 2022-07-05T08:42:41Z | - |
dc.date.available | 2022-07-05T08:42:41Z | - |
dc.date.created | 2022-07-05 | - |
dc.date.issued | 2007 | - |
dc.identifier.issn | 1012-0394 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/29931 | - |
dc.description.abstract | For flip-chip process of RF system-on-packages(SOP), double bump bonding processes were investigated. Sn-Ag and Sri solder joints were formed by the reflowed double bumping process, and Sn/In/Sn bump joints were fabricated by the non-reflowed double bump bonding process. The height-to-size ratios of 0.78 and 0.65 were obtained for the reflowed double bumping and the non-reflowed bumping, respectively. Average contact resistance of the reflowed Sn-Ag and Sri solder joints was about 13m Omega which was much lower than 24 similar to 33m Omega of the non-reflowed Sn/In/Sn bump joints. The reflowed solder double bumping method is more suitable for flip-chip process of RF-SOP than the non-reflowed double bump bonding. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | TRANS TECH PUBLICATIONS LTD | - |
dc.subject | THIN-FILM TECHNOLOGY | - |
dc.title | Bump formation and flip chip processes for RF system-on-packages | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Oh, Tae-Sung | - |
dc.identifier.doi | 10.4028/www.scientific.net/SSP.124-126.25 | - |
dc.identifier.wosid | 000245890100007 | - |
dc.identifier.bibliographicCitation | ADVANCES IN NANOMATERIALS AND PROCESSING, PTS 1 AND 2, v.124-126, pp.25 - + | - |
dc.relation.isPartOf | ADVANCES IN NANOMATERIALS AND PROCESSING, PTS 1 AND 2 | - |
dc.citation.title | ADVANCES IN NANOMATERIALS AND PROCESSING, PTS 1 AND 2 | - |
dc.citation.volume | 124-126 | - |
dc.citation.startPage | 25 | - |
dc.citation.endPage | + | - |
dc.type.rims | ART | - |
dc.type.docType | Proceedings Paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | THIN-FILM TECHNOLOGY | - |
dc.subject.keywordAuthor | flip chip | - |
dc.subject.keywordAuthor | SOP | - |
dc.subject.keywordAuthor | RF package | - |
dc.subject.keywordAuthor | bump | - |
dc.subject.keywordAuthor | electronic package | - |
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