ScholarWorks@Hongik: Kim, Jong Sun

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Kim, Jong Sun (김종선)

Engineering (Electronic & Electrical Engineering)

Research Area: 전자공학, 아날로그 집적회로 설계, Electrical Engineering, Analog Integrated Circuit Design

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MDLL:18||DLL:14||SDRAM:7||DRAM:7||DDR4:7||multiplying delaylocked loop:6||SerDes:6||clock generator:5||clock multiplier:5||CDR:5||DDR3:5||Memory:4||frequency multiplier:4||multiplying DLL:4||TDC:4||timetodigital converter:3||Delaylocked loop:3||clock and data recovery:3||Pulse Generation Circuit:2||Head:2||BCD:2||duty cycle:2||DCC:2||dutycycle corrector:2||CMOS:2||phase interpolator:2||Clock Generator:2||Equalizer:2||clock generation:2||DDR5:2||SoC:2||Multiplying delaylocked loop:2||Delay locked loop:2||delaylocked loop:2||PLL:2||Piezoelectric:2||digital DLL:2||Printer:2||Gate Driver:1||Harmonic Lock:1||Harmonic lock:1||I/O interconnect:1||I/O interface:1||IC:1||LC VCO:1||LPDDR3:1||LPDDR4:1||LPDDR5:1||Lithiumion Battery protection:1||Memory bus:1||Near ground signaling:1||NetworkOnChips(NoCs):1||Power Management:1||RF interconnect:1||RF power detector:1||RMS power detector:1||SMP:1||SOC:1||SSCG:1||Serial link:1||SerialLink:1||Seriallink:1||SiP:1||Spread spectrum clock:1||TDC search algorithm:1||VGA:1||VLSI:1||Wireline and Wireless RFInterconnect(RFI):1||alldigital delaylocked loop:1||amplifiers:1||analoguedigital conversion:1||automatic gain control(AGC):1||automatic test:1||battery protection:1||binary search algorithm:1||builtofftest:1||charge coupled device signal processing:1||chargecoupled device circuits:1||chiplet:1||clock cycles:1||clock duty:1||clock dutycycle corrector:1||clock generatcr:1||clock multiplication:1||clock tree:1||clocking:1||clocks:1||communication:1||component:1||concurrency:1||correlated double sampling circuit:1||currentmode driver:1||delay circuit:1||delay element:1||deserializer:1||deskew:1||dietodie interface:1||digital delay line:1||digitallycontrolled oscillator:1||dock multiplier:1||dualband signaling:1||duty cycle corrector:1||dutycycle amplifier:1||equalizer:1||fast locking:1||fastlocking DLL:1||frequency 1:1||frequency divider:1||frequency division:1||frequency multiplication:1||frequency synthesizer:1||gain 0 dB to 18 dB:1||harmonic lock problems:1||harmonicfree:1||heterogeneous integration:1||hybrid search algorithm:1||impedance transformation:1||integrated circuit noise:1||interconnect:1||intrinsic delay:1||jitter:1||jitter attenuator:1||jitter cleaner:1||lithiumion battery:1||lowpower DLL:1||lowpower electronics:1||memory:1||memory interface:1||memory latency:1||memory systems:1||mobile memory interface:1||multiband RFInterconnect (RFI):1||multiphase clock:1||multicore processor:1||noise elimination:1||onchip network:1||pp output clock jitter:1||peaktopeak output clock jitter:1||power 6:1||propagation delay:1||randomaccess storage:1||receiver:1||search problems:1||sequential search algorithm:1||serial link:1||serializer:1||signal conditioning circuits:1||simultaneous bidirectional:1||size 0:1||size 65 nm:1||successive approximation register (SAR):1||synchronisation:1||synchronous dynamic random access memory:1||systemonchip:1||timedigital conversion:1||timing jitter:1||variable gain amplifier(VGA):1||variablegain amplifier:1||voltage 1 V:1||voltagemode driver:1||wire line transceiver:1||word length 9 bit:1||듀티엠플리파이어:1||클록 듀티싸이클 코렉터:1||0 GHz:1||클록킹:1||025 mm:1||5 GHz to 5:1||9 mW:1||Advanced Memory Interface:1||Amplitude Shift Key (ASK):1||Amplitudeshiftkeying (ASK):1||Auto release standby mode:1||BPIC:1||Battery protection IC:1||Boost Converter:1||Boundary Switching:1||Buck Converter:1||CCD signal amplitude:1||CCD signal processing:1||CDS circuit:1||CMOS memory circuits:1||CMOS process:1||CMP:1||Clock and Data Recovery:1||Clock duty cycle:1||Clock generation:1||Contactless Connector:1||DCDC:1||DCDC converter CCM:1||DCM:1||DDR:1||DelayLocked Loop:1||Digital DLL:1||Digital MDLL:1||Dutycycle corrector (DCC):1||EMI:1||Frequency Multiplication:1||Frequency Multiplier:1||Frequency Synthesizer:1||Frequency modulation:1||Frequency multiplication:1||GaN:1||

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