ScholarWorks@Hongik: Kim, Young min

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Kim, Young min (김영민)

Engineering (Electronic & Electrical Engineering)

Research Area: 전자공학, 집적회로 설계, Electrical Engineering, Integrated Circuit Design

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FPGA:13||Approximate computing:8||SRAM:6||Approximate Computing:4||LowerpartOR:3||BCAM:3||bitstream:3||Reverse engineering:3||Low power:3||noninvasive attack:3||Approximate adder:3||Stochastic computing:3||ProcessinMemory (PIM):2||Delay:2||Hardware accelerator:2||Hardware synthesis:2||Modular Subtraction Unit:2||Radiationhardened by design (RHBD):2||Multiplier:2||approximate computing:2||Accuracy:2||Image classification:2||42 compressor:2||Content Addressable Memory (CAM):2||Fast:2||stochastic computing:2||Singleevent transient (SET):2||Singleevent upset (SEU):2||Singlenode upset (SNU):2||von Neumann bottleneck:2||edge detection:2||Sobel edge detection:2||Spiking neuron models:2||CAM:2||Edge detection:2||flash memory:2||8T SRAM:2||Binary CAM:2||Power consumption:2||True singlephase clock (TSPC):2||Powerefficient:2||logic analyzer:2||Error metrics:2||Verilog:2||Verilog HDL:2||Flash ADC:1||Floating Body:1||FullAdder:1||Gate Diffusion Input:1||HDL:1||Half Adder:1||Hardware Accelerators:1||Hardware Implementation:1||Highlevel Synthesis:1||Highspeed:1||InMemory Computing (IMC):1||InMemory Computing(IMC):1||Inmemory computing:1||IoT:1||LOA(Low part OR adder):1||Latched comparator:1||Latency:1||LatticeBased Cryptography(LBC):1||Low Power:1||Low part OR gate Adder(LOA):1||LowerPartOR:1||MCU:1||Memory Cell:1||Memory wall:1||Modular Arithmetic:1||Multivalued logic:1||NEM memory switch:1||NTT:1||NanoElectroMechanical (NEM):1||Nanoelectromechanical (NEM) memory switch:1||Nanoelectromechanical Memory Switch:1||Neural Network:1||Noise Margin:1||Noninvasive attack:1||Nonvolatile operation:1||Number Theoretic Transform:1||PID:1||PWM generator:1||Polynomial Multiplication:1||Polynomial multiplication:1||Power integrity (PI):1||Processin Memory:1||ProcessinMemory(PIM):1||Processing in Memory:1||Quantization:1||RSA:1||Railtorail input detection:1||Realtime Automatic Gain Controller:1||Restoring division:1||Reverse Engineering:1||RingLearning With Errors(RLWE):1||Rotary encoder:1||SAR ADC:1||Sequential circuit:1||Shift operation:1||Spartan 6:1||Stochastic Computing:1||Switch:1||TCAM:1||TRNG:1||Ternary:1||Ternary ALU:1||Ternary Content Addressable Memory:1||Throughput:1||Unipolar Adder:1||Unipolar adder:1||Vivado:1||XNOR:1||XOR operator:1||Xilinx:1||Xilinx 7series FPGAs:1||accelerator:1||analysis methodology:1||approximate adder:1||binary CAM:1||biosignal:1||channel length biasing:1||chargedomain SRAMIMC:1||chippackagePCB coanalysis:1||content addressable memory (CAM):1||convolutional neural network:1||cube network:1||data encryption:1||deep neural network:1||dynamic randomaccess memory:1||dynamic systems:1||energy efficiency:1||energyefficiency:1||energyefficient design:1||error tolerant adder(ETA):1||filter:1||flashSAR ADC:1||fully connected mesh network:1||highlevel synthesis:1||highspeed:1||highspeed memory:1||inmemory computing:1||inmemory computing (IMC):1||inexact computing:1||leakage:1||logic extract:1||low power double data rate four (LPDDR4):1||lowpower:1||matchline (ML) structure:1||memory wall:1||modulation:1||multidomain coupling:1||multichannel repeater:1||nanoelectromechanical (NEM):1||near threshold voltage (NTV):1||power delivery system:1||power distribution network (PDN):1||prechargefree:1||project Xray:1||railtorail comparator:1||read margin:1||response time:1||restoring:1||reverse engineering:1||rowhammer:1||security:1||static random access memory:1||ternary CAM:1||thermometer CDAC:1||vivado design suite:1||vulnerability:1||wire exchange:1||1bit full adder:1||wireless communication:1||10Tbitcell:1||65nm process:1||ASIC Design:1||Accelerator:1||Approximate Adder:1||Approximate Computing(AC):1||Approximate divider:1||Approximate multiplication:1||Assist circuits:1||Binarized neural network:1||Binary Neural Network (BNN):1||Bit Fusion:1||BitLevel Composability:1||Body bias:1||Booth Fusion:1||CPER(Carry prediction error rate):1||CVDD:1||Carry Predicting Adder:1||Carry lookahead adder:1||Cascaded Integrator Comb filter:1||Computation in Memory:1||Computer vision:1||Contentaddressable memory (CAM):1||Convolution Neural Network (CNN):1||Convolutional Neural Network:1||Critical Path:1||D FlipFlop:1||DMB repeaters:1||Digital circuit:1||Divider:1||Dual Line:1||Duty Cycle:1||ER(Error Rate):1||ETA(Error Tolerant Adder):1||Energy efficiency:1||Energy quality scalability:1||Enhanced Carry Predicting Error Tolerant Adder:1||Error distance:1||Error rate:1||Error tolerant computing:1||FM repeaters:1||FPGA reverse engineering:1||FPGA.:1||Finite Impulse Response filter:1||

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