A 10-bit 20-MS/s Asynchronous SAR ADC with Meta-Stability Detector Using Replica Comparators
- Authors
- Park, Sang-Min; Jeong, Yeon-Ho; Hwang, Yu-Jeong; Lee, Pil-Ho; Kim, Yeong-Woong; Son, Jisu; Lee, Han-Yeol; Jang, Young-Chan
- Issue Date
- Jun-2016
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Keywords
- asynchronous successive approximation register; analog-to-digital converter; meta-stability detector; replica comparator
- Citation
- IEICE TRANSACTIONS ON ELECTRONICS, v.E99C, no.6, pp.651 - 654
- Journal Title
- IEICE TRANSACTIONS ON ELECTRONICS
- Volume
- E99C
- Number
- 6
- Start Page
- 651
- End Page
- 654
- URI
- https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/1202
- DOI
- 10.1587/transele.E99.C.651
- ISSN
- 1745-1353
- Abstract
- A 10-bit 20-MS/s asynchronous SAR ADC with a meta-stability detector using replica comparators is proposed. The proposed SAR ADC with the area of 0.093 mm(2) is implemented using a 130-nm CMOS process with a 1.2-V supply. The measured peak ENOBs for the full rail-to-rail differential input signal is 9.6 bits.
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