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A 3 Gbps/Lane MIPI D-PHY Transmission Buffer Chip
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Pil-Ho | - |
| dc.contributor.author | Jang, Young-Chan | - |
| dc.date.available | 2020-04-24T10:25:11Z | - |
| dc.date.created | 2020-03-31 | - |
| dc.date.issued | 2019-06 | - |
| dc.identifier.issn | 0916-8508 | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/172 | - |
| dc.description.abstract | A 3 Gbps/lane transmission buffer chip including a high-speed mode detector is proposed for a field-programmable gate array (FPGA)-based frame generator supporting the mobile industry processor interface (MIPI) D-PHY version 1.2. It performs 1-to-3 repeat while buffering low voltage differential signaling (LVDS) or scalable low voltage signaling (SLVS) to SLVS. | - |
| dc.language | 영어 | - |
| dc.language.iso | en | - |
| dc.publisher | IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG | - |
| dc.subject | TRANSMITTER | - |
| dc.subject | GBPS | - |
| dc.title | A 3 Gbps/Lane MIPI D-PHY Transmission Buffer Chip | - |
| dc.type | Article | - |
| dc.contributor.affiliatedAuthor | Jang, Young-Chan | - |
| dc.identifier.doi | 10.1587/transfun.E102.A.783 | - |
| dc.identifier.scopusid | 2-s2.0-85069606292 | - |
| dc.identifier.wosid | 000473256200005 | - |
| dc.identifier.bibliographicCitation | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E102A, no.6, pp.783 - 787 | - |
| dc.relation.isPartOf | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | - |
| dc.citation.title | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES | - |
| dc.citation.volume | E102A | - |
| dc.citation.number | 6 | - |
| dc.citation.startPage | 783 | - |
| dc.citation.endPage | 787 | - |
| dc.type.rims | ART | - |
| dc.type.docType | Article | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
| dc.relation.journalResearchArea | Computer Science | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
| dc.relation.journalWebOfScienceCategory | Computer Science, Information Systems | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.subject.keywordPlus | TRANSMITTER | - |
| dc.subject.keywordPlus | GBPS | - |
| dc.subject.keywordAuthor | transmission buffer chip | - |
| dc.subject.keywordAuthor | LVDS | - |
| dc.subject.keywordAuthor | SLVS | - |
| dc.subject.keywordAuthor | MIPI D-PHY | - |
| dc.subject.keywordAuthor | FPGA-based frame generator | - |
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Related Researcher
- JANG, YOUNG CHAN
- College of Engineering (School of Electronic Engineering)