6.5 kV SiC Power Devices with Improved Blocking Characteristics against Process Deviations
DC Field | Value | Language |
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dc.contributor.author | Jung, Junki | - |
dc.contributor.author | Seok, Ogyun | - |
dc.contributor.author | Kang, In Ho | - |
dc.contributor.author | Kim, Hyoung Woo | - |
dc.contributor.author | Bahng, Wook | - |
dc.contributor.author | Lee, Ho-Jun | - |
dc.date.accessioned | 2022-05-17T02:40:05Z | - |
dc.date.available | 2022-05-17T02:40:05Z | - |
dc.date.created | 2022-05-17 | - |
dc.date.issued | 2021-04 | - |
dc.identifier.issn | 1598-1657 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/kumoh/handle/2020.sw.kumoh/21114 | - |
dc.description.abstract | Edge termination structures that are insensitive to process deviations were investigated to obtain 6.5 kV SIC power devices with stable blocking characteristics. Edge terminations were designed and verified by a TCAD simulation in consideration of undesirable surface charge states and variation of the implantation window in the termination region. A constant-space floating guard ring (CS-FGR) was sensitive to the variation of the implantation window. A gradually increasing space (GIS) FGR was less sensitive to process deviations than the CS-FGR. We concluded that the GIS-FGR is sufficiently stable for use in high-voltage SiC devices at surface charge densities (Q(surf)/q) of 0 to -1 x 10(12) cm(-2) and implantation window variations of -0.3 to +0.3 mu m. The optimized GIS-FGR exhibited a high breakdown voltage of over 8 kV at all the Q(surf)/q valnes and in the implantation window variation range considered in this paper. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | IEEK PUBLICATION CENTER | - |
dc.title | 6.5 kV SiC Power Devices with Improved Blocking Characteristics against Process Deviations | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Seok, Ogyun | - |
dc.identifier.doi | 10.5573/JSTS.2021.21.2.119 | - |
dc.identifier.wosid | 000744770900004 | - |
dc.identifier.bibliographicCitation | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.21, no.2, pp.119 - 125 | - |
dc.relation.isPartOf | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.title | JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE | - |
dc.citation.volume | 21 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 119 | - |
dc.citation.endPage | 125 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.description.journalRegisteredClass | kci | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.subject.keywordPlus | AVALANCHE BREAKDOWN | - |
dc.subject.keywordPlus | EDGE TERMINATION | - |
dc.subject.keywordPlus | VOLTAGE | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordAuthor | SiC | - |
dc.subject.keywordAuthor | power device | - |
dc.subject.keywordAuthor | Edge termination | - |
dc.subject.keywordAuthor | JTE | - |
dc.subject.keywordAuthor | FGR | - |
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