프로세서에서 마지막 레벨 캐시의 성능 개선 위한 캐시 교체정책

Abstract

Reduction in cache miss rates continues to be an important issue in processor design, especially at the last level cache(LLC). The Least Recently Used(LRU) replacement policy has been widely adapted in processors for the past decades. The LRU replacement policy represents the cache blocks in a set as LRU stack. So, it only use the recency information. And it is expensive to implement in hardware. Also in some workload, it raises the thrashing, i.e., blocks with high reuse evicting each other from the cache. We propose an new replacement policy to solve problems of LRU replacement policy. In the proposed policy, a incoming block is inserted at the bottom of the set. To exploit the frequency information, a hit block exchanges its position with its adjacent block above in the set. A victim block can be chosen from bottom. Selecting the bottom block as the victim makes the proposed policy to protect the cache from polluting by less frequently used blocks. It also proposes to divide the blocks in a cache set into groups to resolve the thrashing. The victim block is selected alternately from each group. The proposed policy reduces the average MPKI(Miss Per Kilo Instructions) of the baseline 1MB 16-way LLC cache using LRU replacement policy by 12.9%. It reduces the storage requirement by 47% compared to LRU replacement policy.