Design of Group Delay Time Controller Based on a Reflective Parallel Resonator
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chaudhary, Girdhari | - |
dc.contributor.author | Choi, Heungjae | - |
dc.contributor.author | Jeong, Yongchae | - |
dc.contributor.author | Lim, Jongsik | - |
dc.contributor.author | Kim, Chul Dong | - |
dc.date.accessioned | 2021-08-12T03:27:16Z | - |
dc.date.available | 2021-08-12T03:27:16Z | - |
dc.date.issued | 2012-04 | - |
dc.identifier.issn | 1225-6463 | - |
dc.identifier.issn | 2233-7326 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/sch/handle/2021.sw.sch/15279 | - |
dc.description.abstract | In this paper, a group delay time controller (GDTC) is proposed based on a reflection topology employing a parallel resonator as the reflection termination. The design equations of the proposed GDTC have been derived and validated by simulation and experimental results. The group delay time can be varied by varying the capacitance and inductance at an operating frequency. To show the validity of the proposed circuit, an experiment was performed for a wideband code division multiple access downlink band operating at 2.11 GHz to 2.17 GHz. According to the experiment, a group delay time variation of 3 +/- 0.17 ns over bandwidth of 60 MHz with excellent flatness is obtained. | - |
dc.format.extent | 6 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | 한국전자통신연구원 | - |
dc.title | Design of Group Delay Time Controller Based on a Reflective Parallel Resonator | - |
dc.type | Article | - |
dc.publisher.location | 대한민국 | - |
dc.identifier.doi | 10.4218/etrij.12.0110.0689 | - |
dc.identifier.scopusid | 2-s2.0-84860170422 | - |
dc.identifier.wosid | 000302846900008 | - |
dc.identifier.bibliographicCitation | ETRI Journal, v.34, no.2, pp 210 - 215 | - |
dc.citation.title | ETRI Journal | - |
dc.citation.volume | 34 | - |
dc.citation.number | 2 | - |
dc.citation.startPage | 210 | - |
dc.citation.endPage | 215 | - |
dc.type.docType | Article | - |
dc.identifier.kciid | ART001648861 | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.description.journalRegisteredClass | kci | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.subject.keywordPlus | PHASE-SHIFTER | - |
dc.subject.keywordPlus | ADJUSTER | - |
dc.subject.keywordPlus | TOPOLOGY | - |
dc.subject.keywordPlus | CIRCUIT | - |
dc.subject.keywordAuthor | Group delay time controller | - |
dc.subject.keywordAuthor | resonance circuit | - |
dc.subject.keywordAuthor | varactor diode | - |
dc.subject.keywordAuthor | variable inductor | - |
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