CAESAR: A CNN Accelerator Exploiting Sparsity and Redundancy Pattern
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, S.[Kim, Seongwook] | - |
dc.contributor.author | Kim, Y.[Kim, Yongjun] | - |
dc.contributor.author | Byeon, G.[Byeon, Gwangeun] | - |
dc.contributor.author | Hong, S.[Hong, Seokin] | - |
dc.date.accessioned | 2023-09-12T02:40:32Z | - |
dc.date.available | 2023-09-12T02:40:32Z | - |
dc.date.created | 2023-09-12 | - |
dc.date.issued | 2023 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/108275 | - |
dc.description.abstract | Convolutional Neural Networks (CNN) have shown outstanding performance in many computer vision applications. However, CNN Inference on mobile and edge devices is challenging due to high computation demands. Recently, many prior studies have tried to address this challenge by reducing the data precision with quantization techniques, leading to abundant redundancy in the CNN models. This paper proposes CAESAR, a CNN accelerator that eliminates redundant computations to reduce the computation demands of CNN inference. By analyzing the computation pattern of the convolution layer, CAESAR predicts the location where the redundant computations occur and removes them in the executions. After that, CAESAR remaps the remaining effectual computations on the processing elements originally mapped to the redundant computations so that all processing elements are fully utilized. Based on our evaluation with a cycle-level microarchitecture simulator, CAESAR achieves an overall speedup of up to 2.13x and saves energy by 78% over the TPU-like baseline accelerator. © 2023 IEEE. | - |
dc.language | 영어 | - |
dc.language.iso | en | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | CAESAR: A CNN Accelerator Exploiting Sparsity and Redundancy Pattern | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, S.[Kim, Seongwook] | - |
dc.contributor.affiliatedAuthor | Byeon, G.[Byeon, Gwangeun] | - |
dc.contributor.affiliatedAuthor | Hong, S.[Hong, Seokin] | - |
dc.identifier.doi | 10.1109/ITC-CSCC58803.2023.10212679 | - |
dc.identifier.scopusid | 2-s2.0-85169805522 | - |
dc.identifier.bibliographicCitation | 2023 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2023 | - |
dc.relation.isPartOf | 2023 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2023 | - |
dc.citation.title | 2023 International Technical Conference on Circuits/Systems, Computers, and Communications, ITC-CSCC 2023 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference paper | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scopus | - |
dc.subject.keywordAuthor | Accelerator | - |
dc.subject.keywordAuthor | Computation Reuse | - |
dc.subject.keywordAuthor | Convolution Neural Network | - |
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