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A configurable, multi-mode comma detection and word alignment controller for high speed serial interface in 130 nm CMOS technology

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dc.contributor.authorAli, I.[Ali, I.]-
dc.contributor.authorAsif, M.[Asif, M.]-
dc.contributor.authorRehman, M.R.U.[Rehman, M.R.U.]-
dc.contributor.authorBasim, M.[Basim, M.]-
dc.contributor.authorKim, S.J.[Kim, S.J.]-
dc.contributor.authorLee, K.-Y.[Lee, K.-Y.]-
dc.date.accessioned2021-07-29T05:26:46Z-
dc.date.available2021-07-29T05:26:46Z-
dc.date.created2019-11-29-
dc.date.issued2019-
dc.identifier.issn0000-0000-
dc.identifier.urihttps://scholarworks.bwise.kr/skku/handle/2021.sw.skku/15805-
dc.description.abstractIn this paper, a comma detection with word alignment controller is proposed for high speed serial interface applications. Before the word alignment, a configurable number of successive comma detection enhances the reliability of the controller. The comma control word is also configurable to make it flexible for numerous applications. In the proposed multi-mode architecture, automatic and manual control are also incorporated. The presented architecture is fully synthesizable. It occupies a very small area of 110 × 100 µm 2 and it requires only 1.556 K gates for its implementation. The current and power requirements are 681.09 µA and 817.31 µW respectively from 1.2 V power supply. The design is integrated into 3.125 Gbps JESD204B serial interface which is fabricated in 1P6M 130 nm CMOS process. The simulation and measurement result ensures the reliability of the proposed architecture. © 2018 IEEE.-
dc.language영어-
dc.language.isoen-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.subjectCMOS integrated circuits-
dc.subjectInterfaces (computer)-
dc.subject130 nm cmos technologies-
dc.subjectConfigurable-
dc.subjectHigh speed serial interface-
dc.subjectJESD204B-
dc.subjectPower requirement-
dc.subjectProposed architectures-
dc.subjectSimulations and measurements-
dc.subjectWord alignment-
dc.subjectControllers-
dc.titleA configurable, multi-mode comma detection and word alignment controller for high speed serial interface in 130 nm CMOS technology-
dc.typeArticle-
dc.contributor.affiliatedAuthorAli, I.[Ali, I.]-
dc.contributor.affiliatedAuthorAsif, M.[Asif, M.]-
dc.contributor.affiliatedAuthorRehman, M.R.U.[Rehman, M.R.U.]-
dc.contributor.affiliatedAuthorBasim, M.[Basim, M.]-
dc.contributor.affiliatedAuthorKim, S.J.[Kim, S.J.]-
dc.contributor.affiliatedAuthorLee, K.-Y.[Lee, K.-Y.]-
dc.identifier.doi10.1109/ICET.2018.8603553-
dc.identifier.scopusid2-s2.0-85061692287-
dc.identifier.bibliographicCitation2018 14th International Conference on Emerging Technologies, ICET 2018-
dc.relation.isPartOf2018 14th International Conference on Emerging Technologies, ICET 2018-
dc.citation.title2018 14th International Conference on Emerging Technologies, ICET 2018-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass3-
dc.subject.keywordPlusCMOS integrated circuits-
dc.subject.keywordPlusInterfaces (computer)-
dc.subject.keywordPlus130 nm cmos technologies-
dc.subject.keywordPlusConfigurable-
dc.subject.keywordPlusHigh speed serial interface-
dc.subject.keywordPlusJESD204B-
dc.subject.keywordPlusPower requirement-
dc.subject.keywordPlusProposed architectures-
dc.subject.keywordPlusSimulations and measurements-
dc.subject.keywordPlusWord alignment-
dc.subject.keywordPlusControllers-
dc.subject.keywordAuthor8B10B encoding-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthorComma detection-
dc.subject.keywordAuthorConfigurable-
dc.subject.keywordAuthorController-
dc.subject.keywordAuthorJESD204B-
dc.subject.keywordAuthorWord alignment-
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