Work-in-progress: Improving NVMe SSD I/O determinism with PCIe virtual channel
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, S.[Kim, S.] | - |
dc.contributor.author | Yang, J.-S.[Yang, J.-S.] | - |
dc.date.accessioned | 2021-07-30T23:45:32Z | - |
dc.date.available | 2021-07-30T23:45:32Z | - |
dc.date.created | 2018-04-10 | - |
dc.date.issued | 2017 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/32900 | - |
dc.description.abstract | NVMe SSD over PCIe is attractive since it provides high throughput and low latency. However, complex internal SSD operations may cause a non-deterministic I/O latency which is one of the most important factors in a storage system. While conventional approaches to enhance I/O latency prediction are based on host systems, this paper proposes a novel SSD-based deterministic latency enhancement scheme. The proposed method exploits the fact that multiple virtual channels can be utilized. For each virtual channel, the proposed method assigns a different priority for data transmission. NVMe SSD analyses its internal latency and dynamically chooses the virtual channels to compensate the latency. The experimental results show that, using a PCIe switch model, the proposed method can save 41.6% of the latency for each transaction layer packet. © 2017 Association for Computing Machinery. | - |
dc.publisher | Association for Computing Machinery, Inc | - |
dc.subject | Communication channels (information theory) | - |
dc.subject | Digital storage | - |
dc.subject | Program compilers | - |
dc.subject | Conventional approach | - |
dc.subject | Determinism | - |
dc.subject | Latency predictions | - |
dc.subject | NVMe | - |
dc.subject | PCIe | - |
dc.subject | Transaction layer packets | - |
dc.subject | Virtual channels | - |
dc.subject | Work in progress | - |
dc.subject | Embedded systems | - |
dc.title | Work-in-progress: Improving NVMe SSD I/O determinism with PCIe virtual channel | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, S.[Kim, S.] | - |
dc.contributor.affiliatedAuthor | Yang, J.-S.[Yang, J.-S.] | - |
dc.identifier.doi | 10.1145/3125501.3125520 | - |
dc.identifier.scopusid | 2-s2.0-85035352079 | - |
dc.identifier.wosid | 000426915700011 | - |
dc.identifier.bibliographicCitation | Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017 | - |
dc.relation.isPartOf | Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017 | - |
dc.citation.title | Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 3 | - |
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