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Work-in-progress: Improving NVMe SSD I/O determinism with PCIe virtual channel

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dc.contributor.authorKim, S.[Kim, S.]-
dc.contributor.authorYang, J.-S.[Yang, J.-S.]-
dc.date.accessioned2021-07-30T23:45:32Z-
dc.date.available2021-07-30T23:45:32Z-
dc.date.created2018-04-10-
dc.date.issued2017-
dc.identifier.issn0000-0000-
dc.identifier.urihttps://scholarworks.bwise.kr/skku/handle/2021.sw.skku/32900-
dc.description.abstractNVMe SSD over PCIe is attractive since it provides high throughput and low latency. However, complex internal SSD operations may cause a non-deterministic I/O latency which is one of the most important factors in a storage system. While conventional approaches to enhance I/O latency prediction are based on host systems, this paper proposes a novel SSD-based deterministic latency enhancement scheme. The proposed method exploits the fact that multiple virtual channels can be utilized. For each virtual channel, the proposed method assigns a different priority for data transmission. NVMe SSD analyses its internal latency and dynamically chooses the virtual channels to compensate the latency. The experimental results show that, using a PCIe switch model, the proposed method can save 41.6% of the latency for each transaction layer packet. © 2017 Association for Computing Machinery.-
dc.publisherAssociation for Computing Machinery, Inc-
dc.subjectCommunication channels (information theory)-
dc.subjectDigital storage-
dc.subjectProgram compilers-
dc.subjectConventional approach-
dc.subjectDeterminism-
dc.subjectLatency predictions-
dc.subjectNVMe-
dc.subjectPCIe-
dc.subjectTransaction layer packets-
dc.subjectVirtual channels-
dc.subjectWork in progress-
dc.subjectEmbedded systems-
dc.titleWork-in-progress: Improving NVMe SSD I/O determinism with PCIe virtual channel-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, S.[Kim, S.]-
dc.contributor.affiliatedAuthorYang, J.-S.[Yang, J.-S.]-
dc.identifier.doi10.1145/3125501.3125520-
dc.identifier.scopusid2-s2.0-85035352079-
dc.identifier.wosid000426915700011-
dc.identifier.bibliographicCitationProceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017-
dc.relation.isPartOfProceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017-
dc.citation.titleProceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017-
dc.type.rimsART-
dc.type.docTypeConference Paper-
dc.description.journalClass3-
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