Light path and surface morphology optimization for optical carrier loss minimization at thin-wafer based solar cell fabrication applications
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, C.[Park, C.] | - |
dc.contributor.author | Balaji, N.[Balaji, N.] | - |
dc.contributor.author | Ju, M.[Ju, M.] | - |
dc.contributor.author | Ahn, S.[Ahn, S.] | - |
dc.contributor.author | Shim, G.[Shim, G.] | - |
dc.contributor.author | Han, S.[Han, S.] | - |
dc.contributor.author | Park, S.[Park, S.] | - |
dc.contributor.author | Ahn, H.[Ahn, H.] | - |
dc.contributor.author | So, W.-W.[So, W.-W.] | - |
dc.contributor.author | Yi, J.[Yi, J.] | - |
dc.date.accessioned | 2021-07-31T00:25:55Z | - |
dc.date.available | 2021-07-31T00:25:55Z | - |
dc.date.created | 2018-04-10 | - |
dc.date.issued | 2017 | - |
dc.identifier.issn | 0000-0000 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/33117 | - |
dc.description.abstract | The thickness of wafers for manufacturing silicon solar cells is getting thinner in order to take advantage of the advancement of wafer fabrication process technology and price competitiveness. As the thickness of the wafer becomes thinner, the solar cell manufacturing process and technology for thinner wafer are needed. In this paper, we analyze the tendency of optical and electrical losses according to the change of wafer thickness from 200m to 30m, which is used in the past, to clarify the limit of thinning of wafer and to mention the surface structure to compensate loss factors. It was found that the lifetime and generation current decreased by 22% and 15% as the wafer thickness changed, respectively. Based on this research, it will be able to grasp the necessary technology, major issues, and direction of high efficiency according to the thinning of wafers. | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.subject | Display devices | - |
dc.subject | Fabrication | - |
dc.subject | Flat panel displays | - |
dc.subject | Manufacture | - |
dc.subject | Silicon solar cells | - |
dc.subject | Solar cells | - |
dc.subject | Thin film transistors | - |
dc.subject | Electrical loss | - |
dc.subject | Generation current | - |
dc.subject | Optical carriers | - |
dc.subject | Price competitiveness | - |
dc.subject | Solar cell fabrication | - |
dc.subject | Solar cell manufacturing | - |
dc.subject | Wafer fabrications | - |
dc.subject | Wafer thickness | - |
dc.subject | Silicon wafers | - |
dc.title | Light path and surface morphology optimization for optical carrier loss minimization at thin-wafer based solar cell fabrication applications | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Park, C.[Park, C.] | - |
dc.contributor.affiliatedAuthor | Balaji, N.[Balaji, N.] | - |
dc.contributor.affiliatedAuthor | Ju, M.[Ju, M.] | - |
dc.contributor.affiliatedAuthor | Ahn, S.[Ahn, S.] | - |
dc.contributor.affiliatedAuthor | Shim, G.[Shim, G.] | - |
dc.contributor.affiliatedAuthor | Han, S.[Han, S.] | - |
dc.contributor.affiliatedAuthor | Park, S.[Park, S.] | - |
dc.contributor.affiliatedAuthor | Yi, J.[Yi, J.] | - |
dc.identifier.scopusid | 2-s2.0-85034443603 | - |
dc.identifier.bibliographicCitation | AM-FPD 2017 - 24th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings, pp.215 - 218 | - |
dc.relation.isPartOf | AM-FPD 2017 - 24th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings | - |
dc.citation.title | AM-FPD 2017 - 24th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings | - |
dc.citation.startPage | 215 | - |
dc.citation.endPage | 218 | - |
dc.type.rims | ART | - |
dc.type.docType | Conference Paper | - |
dc.description.journalClass | 3 | - |
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