0.37mW/Gb/s low power SLVS transmitter for battery powered applications
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Jeong Y.[Jeong Y.] | - |
dc.contributor.author | Choi Y.-C.[Choi Y.-C.] | - |
dc.contributor.author | Choi E.-J.[Choi E.-J.] | - |
dc.contributor.author | Ham S.[Ham S.] | - |
dc.contributor.author | Kwon K.-W.[Kwon K.-W.] | - |
dc.contributor.author | Jun Y.-H.[Jun Y.-H.] | - |
dc.contributor.author | Chun J.-H.[Chun J.-H.] | - |
dc.date.accessioned | 2021-08-05T17:52:50Z | - |
dc.date.available | 2021-08-05T17:52:50Z | - |
dc.date.created | 2016-08-06 | - |
dc.date.issued | 2012 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/skku/handle/2021.sw.skku/67928 | - |
dc.description.abstract | A power-efficient voltage-mode transmitter for battery powered mobile applications was designed. The proposed transmitter consists of a power optimized 162 serializer, a data-aligner, 21 multiplexing pre-driver, and an I/O driver with segment control for impedance matching. With scalable low-voltage signaling (SLVS) with the output swing of 200mVp-p and power optimization for digital blocks, 0.37mW/Gb/s power consumption was achieved. The test chip for 4.8 Gb/s interfaces was designed in a 65nm 1.2V supply CMOS logic process. The proposed I/O specifications are appropriate for MIPI M-PHY systems. © 2012 IEEE. | - |
dc.subject | Battery powered | - |
dc.subject | Battery-powered applications | - |
dc.subject | CMOS logic process | - |
dc.subject | Digital blocks | - |
dc.subject | I/O drivers | - |
dc.subject | Low Power | - |
dc.subject | Low-voltage | - |
dc.subject | Mobile applications | - |
dc.subject | Output swing | - |
dc.subject | Power efficient | - |
dc.subject | Power Optimization | - |
dc.subject | Pre-driver | - |
dc.subject | Serializers | - |
dc.subject | Test chips | - |
dc.subject | Voltage mode | - |
dc.subject | Optimization | - |
dc.subject | Transmitters | - |
dc.title | 0.37mW/Gb/s low power SLVS transmitter for battery powered applications | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Jeong Y.[Jeong Y.] | - |
dc.contributor.affiliatedAuthor | Choi Y.-C.[Choi Y.-C.] | - |
dc.contributor.affiliatedAuthor | Choi E.-J.[Choi E.-J.] | - |
dc.contributor.affiliatedAuthor | Kwon K.-W.[Kwon K.-W.] | - |
dc.contributor.affiliatedAuthor | Chun J.-H.[Chun J.-H.] | - |
dc.identifier.doi | 10.1109/ISCAS.2012.6271658 | - |
dc.identifier.scopusid | 2-s2.0-84866603498 | - |
dc.identifier.bibliographicCitation | ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems, pp.1955 - 1958 | - |
dc.relation.isPartOf | ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems | - |
dc.citation.title | ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems | - |
dc.citation.startPage | 1955 | - |
dc.citation.endPage | 1958 | - |
dc.type.rims | ART | - |
dc.description.journalClass | 3 | - |
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