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Cited 2 time in webofscience Cited 2 time in scopus
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EVOLUTION OF DIGITALLY CONTROLLED OSCILLATORS

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dc.contributor.authorJalil, Jubayer-
dc.contributor.authorReaz, Mamun Bin Ibne-
dc.contributor.authorMahalingam, Savisha-
dc.contributor.authorAbidin, Syarizal Bin Zainal-
dc.contributor.authorChang, Tae Gyu-
dc.date.available2019-03-08T21:38:47Z-
dc.date.issued2014-08-
dc.identifier.issn1330-3651-
dc.identifier.issn1848-6339-
dc.identifier.urihttps://scholarworks.bwise.kr/cau/handle/2019.sw.cau/11991-
dc.description.abstractCurrent trend of using digital or all-digital phase-locked loops (PLLs) in various communication devices introduces the usage of digitally controlled oscillator (DCO). This review paper discusses the evolution of DCOs in modern electronic devices as well as their performances in local oscillators. Even though the DCO implementation is preferable to its analog counterpart, improvements are still going on to get high performances in terms of power consumption, speed, chip area, frequency range, supply voltage, portability and resolution. This paper mainly describes the evolution of DCO, how it turns from a conventional VCO to DCO for deep-submicrometer CMOS process. The focus is to analyse and track the advances in DCO base on its performance level.-
dc.format.extent6-
dc.language영어-
dc.language.isoENG-
dc.publisherUNIV OSIJEK, TECH FAC-
dc.titleEVOLUTION OF DIGITALLY CONTROLLED OSCILLATORS-
dc.typeArticle-
dc.identifier.bibliographicCitationTEHNICKI VJESNIK-TECHNICAL GAZETTE, v.21, no.4, pp 897 - 902-
dc.description.isOpenAccessN-
dc.identifier.wosid000341262900026-
dc.identifier.scopusid2-s2.0-84906347931-
dc.citation.endPage902-
dc.citation.number4-
dc.citation.startPage897-
dc.citation.titleTEHNICKI VJESNIK-TECHNICAL GAZETTE-
dc.citation.volume21-
dc.type.docTypeArticle-
dc.publisher.location크로아티아-
dc.subject.keywordAuthorAll-Digital PLL (ADPLL)-
dc.subject.keywordAuthorComplementary Metal Oxide Semiconductor (CMOS)-
dc.subject.keywordAuthorDigitally Controlled Oscillator (DCO)-
dc.subject.keywordAuthorDigital PLL (DPLL)-
dc.subject.keywordPlusPHASE-LOCKED LOOP-
dc.subject.keywordPlusCMOS PROCESS-
dc.subject.keywordPlusFREQUENCY-SYNTHESIZER-
dc.subject.keywordPlusWIRELESS APPLICATIONS-
dc.subject.keywordPlusSOC APPLICATIONS-
dc.subject.keywordPlusRECEIVER-
dc.subject.keywordPlusGHZ-
dc.subject.keywordPlusPLL-
dc.subject.keywordPlusDCO-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Multidisciplinary-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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