High Performance Organic Nonvolatile Flash Memory Transistors with High-Resolution Reduced Graphene Oxide Patterns as a Floating Gate
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chung, Dae Sung | - |
dc.contributor.author | Lee, Sung Min | - |
dc.contributor.author | Back, Jang Yeol | - |
dc.contributor.author | Kwon, Soon-Ki | - |
dc.contributor.author | Kim, Yun-Hi | - |
dc.contributor.author | Chang, Suk Tai | - |
dc.date.available | 2019-03-08T21:42:02Z | - |
dc.date.issued | 2014-06 | - |
dc.identifier.issn | 1944-8244 | - |
dc.identifier.issn | 1944-8252 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/12126 | - |
dc.description.abstract | High-performance organic nonvolatile memory transistors (ONVMTs) are demonstrated, the construction of which is based on novel integration of a highly conductive polymer as a semiconductor layer, hydroxyl-free polymer as a tunneling dielectric layer, and high-resolution reduced graphene oxide (rGO) patterns as a floating gate. Finely patterned rGO, with a line width of 20-120 mu m, was embedded between SiO2 and the polymer dielectric layer, which functions as a nearly isolated charge-trapping center. The resulting ONVMTs demonstrated ideal memory behavior, and the transfer characteristics promptly responded to writing and erasing the gate bias. In particular, the retention time of written/erased states tended to increase as the rGO line width was reduced, implying that the line width is a critical factor in suppressing charge release from rGO. Using a 20-mu m-wide rGO pattern, a nonvolatile large memory window (>20 V) was retained for more than 5 x 10(5) s, which is 50 times longer than non-patterned rGO films. | - |
dc.format.extent | 6 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | AMER CHEMICAL SOC | - |
dc.title | High Performance Organic Nonvolatile Flash Memory Transistors with High-Resolution Reduced Graphene Oxide Patterns as a Floating Gate | - |
dc.type | Article | - |
dc.identifier.doi | 10.1021/am501909v | - |
dc.identifier.bibliographicCitation | ACS APPLIED MATERIALS & INTERFACES, v.6, no.12, pp 9524 - 9529 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000338184500075 | - |
dc.identifier.scopusid | 2-s2.0-84903525868 | - |
dc.citation.endPage | 9529 | - |
dc.citation.number | 12 | - |
dc.citation.startPage | 9524 | - |
dc.citation.title | ACS APPLIED MATERIALS & INTERFACES | - |
dc.citation.volume | 6 | - |
dc.type.docType | Article | - |
dc.publisher.location | 미국 | - |
dc.subject.keywordAuthor | organic devices | - |
dc.subject.keywordAuthor | nonvolatile memory devices | - |
dc.subject.keywordAuthor | reduced graphene oxide | - |
dc.subject.keywordAuthor | thin films | - |
dc.subject.keywordAuthor | micropatterning | - |
dc.subject.keywordAuthor | charge-trapping layers | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | THIN-FILMS | - |
dc.subject.keywordPlus | DEVICES | - |
dc.subject.keywordPlus | NANOCRYSTALS | - |
dc.subject.keywordPlus | LAYER | - |
dc.relation.journalResearchArea | Science & Technology - Other Topics | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalWebOfScienceCategory | Nanoscience & Nanotechnology | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
84, Heukseok-ro, Dongjak-gu, Seoul, Republic of Korea (06974)02-820-6194
COPYRIGHT 2019 Chung-Ang University All Rights Reserved.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.