Characterization of electrical and structural properties of strained-Si-on-insulator layers
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Chel-Jong | - |
dc.contributor.author | Jung, Won-Jin | - |
dc.contributor.author | Jun, Myung-Sim | - |
dc.contributor.author | Jang, Moon-Gyu | - |
dc.contributor.author | Lee, Seong-Jae | - |
dc.contributor.author | Park, June | - |
dc.contributor.author | Seong, Maeng-Je | - |
dc.contributor.author | Jung, Myung-Ho | - |
dc.contributor.author | Cho, Won-Ju | - |
dc.date.available | 2019-05-30T05:35:48Z | - |
dc.date.issued | 2008-02 | - |
dc.identifier.issn | 0003-6951 | - |
dc.identifier.issn | 1077-3118 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/23840 | - |
dc.description.abstract | The electrical and structural properties of strained-Si-on-insulator (sSOI) wafers were investigated. The strain, calculated from two-dimensional reciprocal space mapping, was found to be 0.78%, which is comparable to that of fully relaxed Si(1-x)Ge(x) film with Ge concentration of 20.6 at. %. Based on the Raman peak shift combined with measured value of strain, the strain shift coefficient is extracted to be -736 cm(-1). The pseudo-metal-oxide-semiconductor field-effect transistor measurements, employed to characterize the electrical properties of sSOI wafers, showed that both electron and hole mobilities are enhanced by strain. The enhancement factor of electron mobility is larger than that of hole mobility. (c) 2008 American Institute of Physics. | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | AMER INST PHYSICS | - |
dc.title | Characterization of electrical and structural properties of strained-Si-on-insulator layers | - |
dc.type | Article | - |
dc.identifier.doi | 10.1063/1.2885726 | - |
dc.identifier.bibliographicCitation | APPLIED PHYSICS LETTERS, v.92, no.8 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000254297300108 | - |
dc.identifier.scopusid | 2-s2.0-40049084794 | - |
dc.citation.number | 8 | - |
dc.citation.title | APPLIED PHYSICS LETTERS | - |
dc.citation.volume | 92 | - |
dc.type.docType | Article | - |
dc.publisher.location | 미국 | - |
dc.subject.keywordPlus | SILICON INVERSION-LAYERS | - |
dc.subject.keywordPlus | PSEUDO-MOSFET | - |
dc.subject.keywordPlus | SOI | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordPlus | WAFERS | - |
dc.subject.keywordPlus | PARAMETERS | - |
dc.subject.keywordPlus | THICKNESS | - |
dc.subject.keywordPlus | GERMANIUM | - |
dc.subject.keywordPlus | PHONONS | - |
dc.subject.keywordPlus | ALLOYS | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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