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Optimised power distribution to minimise power rating of paralleled rectifiers
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kwak, S. | - |
| dc.contributor.author | Toliyat, H.A. | - |
| dc.date.accessioned | 2021-08-18T04:40:19Z | - |
| dc.date.available | 2021-08-18T04:40:19Z | - |
| dc.date.issued | 2004-03 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.issn | 1350-911X | - |
| dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/48649 | - |
| dc.description.abstract | Analytical derivations for the power rating of the pulsewidth modulated (PWM) rectifier for parallel rectifier configuration, consisting of a diode rectifier and a PWM rectifier are presented. The optimised power distribution between the two rectifiers is proposed to minimise the power rating of the PWM rectifier, resulting in economical implementation. | - |
| dc.format.extent | 3 | - |
| dc.language | 영어 | - |
| dc.language.iso | ENG | - |
| dc.publisher | IEE-INST ELEC ENG | - |
| dc.title | Optimised power distribution to minimise power rating of paralleled rectifiers | - |
| dc.type | Article | - |
| dc.identifier.doi | 10.1049/el:20040194 | - |
| dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.40, no.5, pp 336 - 338 | - |
| dc.description.isOpenAccess | N | - |
| dc.identifier.wosid | 000220568900036 | - |
| dc.identifier.scopusid | 2-s2.0-1642401758 | - |
| dc.citation.endPage | 338 | - |
| dc.citation.number | 5 | - |
| dc.citation.startPage | 336 | - |
| dc.citation.title | ELECTRONICS LETTERS | - |
| dc.citation.volume | 40 | - |
| dc.type.docType | Article | - |
| dc.publisher.location | 영국 | - |
| dc.relation.journalResearchArea | Engineering | - |
| dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
| dc.description.journalRegisteredClass | scie | - |
| dc.description.journalRegisteredClass | scopus | - |
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