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전력용 MOSFET의 온-상태 저항 측정 및 노화 시험 환경 구축

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dc.contributor.author신준호-
dc.contributor.author신종원-
dc.date.accessioned2022-12-15T07:43:37Z-
dc.date.available2022-12-15T07:43:37Z-
dc.date.issued2022-
dc.identifier.issn1229-2214-
dc.identifier.issn2288-6281-
dc.identifier.urihttps://scholarworks.bwise.kr/cau/handle/2019.sw.cau/59655-
dc.description.abstractThis paper presents setting up a laboratory-scale testbed to estimate the aging of power MOSFET devices and integrated power modules by measuring its on-state voltage and current. Based on the aging mechanisms of the component inside the power module (e.g., bond-wire, solder layer, and semiconductor chip), a system to measure the on-state resistance of device-under-test (DUT) is designed and experimented: a full-bridge circuit applies current stress to DUT, and a temperature chamber controls the ambient temperature of DUT during the aging test. The on-state resistance of SiC MOSFET measured by the proposed testbed was increased by 2.5%–3% after 44-hour of the aging test.-
dc.format.extent8-
dc.language한국어-
dc.language.isoKOR-
dc.publisher전력전자학회-
dc.title전력용 MOSFET의 온-상태 저항 측정 및 노화 시험 환경 구축-
dc.title.alternativeTestbed of Power MOSFET Aging Including the Measurement of On-State Resistance-
dc.typeArticle-
dc.identifier.bibliographicCitation전력전자학회 논문지, v.27, no.3, pp 206 - 213-
dc.identifier.kciidART002847342-
dc.description.isOpenAccessN-
dc.citation.endPage213-
dc.citation.number3-
dc.citation.startPage206-
dc.citation.title전력전자학회 논문지-
dc.citation.volume27-
dc.publisher.location대한민국-
dc.subject.keywordAuthorPower MOSFET-
dc.subject.keywordAuthorIntegrated power module-
dc.subject.keywordAuthorAccelerated aging test-
dc.subject.keywordAuthorOn-state resistance-
dc.description.journalRegisteredClasskci-
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