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Mitigating Search Interference with Task-Aware Nested Search

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dc.contributor.authorLee, Jiho-
dc.contributor.authorKim, Eunwoo-
dc.date.accessioned2024-05-20T08:30:16Z-
dc.date.available2024-05-20T08:30:16Z-
dc.date.issued2024-
dc.identifier.issn1057-7149-
dc.identifier.issn1941-0042-
dc.identifier.urihttps://scholarworks.bwise.kr/cau/handle/2019.sw.cau/73794-
dc.description.abstractNeural Architecture Search (NAS) has emerged as a promising tool in the field of AutoML for designing more accurate and efficient architectures. The majority of NAS works employ a weight-sharing technique to reduce the search cost by sharing the weights of a supernet, which is a composite of all architectures produced from the search space. Nonetheless, this method has a significant drawback in that negative interference may arise when candidate architectures share the same weights. This issue becomes even more severe in multi-task searches, where a supernet is shared across tasks. To address this problem, we propose a task-aware nested search for multiple tasks that generates task-specific search spaces and architectures using a search-in-search approach consisting of space-search and architecture-search phases. In the space-search phase, we discover an optimal subspace in a task-aware manner by utilizing the proposed search space generator based on the global search space. On top of each subspace, we search for a promising architecture in the architecture-search phase. This method can mitigate search interference by adaptively sharing weights of the supernet by the generated subspace. The experimental results on various vision benchmarks (CityScapes, NYUv2, and Tiny-Taskonomy) show that the proposed method achieves outstanding performance over existing methods in terms of task accuracy, model parameters, and latency. IEEE-
dc.format.extent13-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleMitigating Search Interference with Task-Aware Nested Search-
dc.typeArticle-
dc.identifier.doi10.1109/TIP.2024.3390996-
dc.identifier.bibliographicCitationIEEE Transactions on Image Processing, v.33, pp 3102 - 3114-
dc.description.isOpenAccessN-
dc.identifier.wosid001214554700009-
dc.identifier.scopusid2-s2.0-85191342488-
dc.citation.endPage3114-
dc.citation.startPage3102-
dc.citation.titleIEEE Transactions on Image Processing-
dc.citation.volume33-
dc.type.docTypeArticle-
dc.publisher.location미국-
dc.subject.keywordAuthormulti-task learning-
dc.subject.keywordAuthorNeural architecture search-
dc.subject.keywordAuthorsearch interference-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryComputer Science, Artificial Intelligence-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
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