The Positive Gate Bias Annealing Method for the Suppression of a Leakage Current in the SPC-Si TFT on a Glass Substrate
DC Field | Value | Language |
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dc.contributor.author | Park, Sang-Geun | - |
dc.contributor.author | Park, Joong-Hyun | - |
dc.contributor.author | Kuk, Seung-Hee | - |
dc.contributor.author | Kang, Dong-Won | - |
dc.contributor.author | Han, Min-Koo | - |
dc.date.accessioned | 2024-07-18T05:00:31Z | - |
dc.date.available | 2024-07-18T05:00:31Z | - |
dc.date.issued | 2008 | - |
dc.identifier.issn | 0272-9172 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/74976 | - |
dc.description.abstract | We fabricated PMOS SPC-Si TFTs which show better current uniformity than ELA poly-Si TFTs and superior stability compare to a-Si:H TFT on a glass substrate employing alternating magnetic field crystallization. However the leakage current of SPC-Si TFT was rather high for circuit element of AMOLED display due to many grain boundaries which could be electron hole generation centers. We applied off-state bias annealing of V(GS)=5V, V(DS)=-20V in order to suppress the leakage current of SPC-Si TFT. When the off-state bias annealing was applied on the SPC-Si TFT, the electron carriers were trapped in the gate insulator by high gate-drain voltage (25V). The trapped electron carriers could reduce the gate-drain field, so that the leakage current of SPC-Si TFT was reduced after off-state bias annealing. We applied AC-bias stress on the gate node of SPC-Si TFT for 20,000 seconds in order to verify that the leakage current of SPC-Si TFT could be remained low at actual AMOLED display circuit after off-state bias annealing. The suppressed leakage current was not altered after AC-bias stress. The off-state bias annealed SPC-Si TFT could be used as pixel element of high quality AMOLED display. | - |
dc.format.extent | 6 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | MATERIALS RESEARCH SOCIETY | - |
dc.title | The Positive Gate Bias Annealing Method for the Suppression of a Leakage Current in the SPC-Si TFT on a Glass Substrate | - |
dc.type | Article | - |
dc.identifier.doi | 10.1557/PROC-1066-A13-03 | - |
dc.identifier.bibliographicCitation | AMORPHOUS AND POLYCRYSTALLINE THIN-FILM SILICON SCIENCE AND TECHNOLOGY-2008, v.1066, pp 301 - 306 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000261398700043 | - |
dc.citation.endPage | 306 | - |
dc.citation.startPage | 301 | - |
dc.citation.title | AMORPHOUS AND POLYCRYSTALLINE THIN-FILM SILICON SCIENCE AND TECHNOLOGY-2008 | - |
dc.citation.volume | 1066 | - |
dc.type.docType | Proceedings Paper | - |
dc.publisher.location | 미국 | - |
dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
dc.relation.journalResearchArea | Materials Science | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Coatings & Films | - |
dc.description.journalRegisteredClass | scie | - |
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