A Spread Spectrum Clock Generator Using a Programmable Linear Frequency Modulator for Multipurpose Electronic Devices
DC Field | Value | Language |
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dc.contributor.author | Ryu, Hyuk | - |
dc.contributor.author | Park, Sangyong | - |
dc.contributor.author | Sung, Eun-Taek | - |
dc.contributor.author | Lee, Seung-Gi | - |
dc.contributor.author | Baek, Donghyun | - |
dc.date.available | 2019-03-08T16:01:14Z | - |
dc.date.issued | 2015-12 | - |
dc.identifier.issn | 0018-9375 | - |
dc.identifier.issn | 1558-187X | - |
dc.identifier.uri | https://scholarworks.bwise.kr/cau/handle/2019.sw.cau/8876 | - |
dc.description.abstract | This paper presents a fractional-N phase-locked loop based spread spectrum clock generator (SSCG) using a programmable linear frequency modulator. The SSCG provides a programmable frequency deviation and modulation frequency regardless of its operating frequency. The ranges of frequency-deviation ratio and modulation frequency are 0-80% and 0-100 kHz with 610 Hz step resolution. The proposed SSCG successfully support five serial-link standards by using a single SSCG, and can be applied to various switching circuits such as class-D power amplifiers or switching power converters. The EMI reduction was measured to be 10.24-13.94 dB under 100-kHz resolution bandwidth. The proposed SSCG was fabricated using a 0.13-mu m CMOS process with an active area of 0.11 mm(2), while consuming an overall power of 6.28 mW at 1 GHz. | - |
dc.format.extent | 10 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A Spread Spectrum Clock Generator Using a Programmable Linear Frequency Modulator for Multipurpose Electronic Devices | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/TEMC.2015.2442618 | - |
dc.identifier.bibliographicCitation | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.57, no.6, pp 1447 - 1456 | - |
dc.description.isOpenAccess | N | - |
dc.identifier.wosid | 000367547100019 | - |
dc.identifier.scopusid | 2-s2.0-84969262466 | - |
dc.citation.endPage | 1456 | - |
dc.citation.number | 6 | - |
dc.citation.startPage | 1447 | - |
dc.citation.title | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY | - |
dc.citation.volume | 57 | - |
dc.type.docType | Article | - |
dc.publisher.location | 미국 | - |
dc.subject.keywordAuthor | EMI reduction | - |
dc.subject.keywordAuthor | frequency modulation | - |
dc.subject.keywordAuthor | phase locked loop (PLL) | - |
dc.subject.keywordAuthor | spread spectrum clock generator (SSCG) | - |
dc.subject.keywordPlus | ELECTROMAGNETIC-INTERFERENCE | - |
dc.subject.keywordPlus | EMI REDUCTION | - |
dc.subject.keywordPlus | LOW-POWER | - |
dc.subject.keywordPlus | JITTER | - |
dc.subject.keywordPlus | CONVERTERS | - |
dc.subject.keywordPlus | AMPLIFIER | - |
dc.subject.keywordPlus | PROFILE | - |
dc.subject.keywordPlus | NOISE | - |
dc.subject.keywordPlus | PLL | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Telecommunications | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Telecommunications | - |
dc.description.journalRegisteredClass | sci | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
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