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Browsing by Wong, H.-S.PhilipAuthor

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Device and circuit interactive design and optimization beyond the conventional scaling era Go to Link

Oh, Saeroonter; Wei, Lan; Chong, Soogine; Luo, Jieying; Wong, H.-S.Philip

ArticleIssue Date2010CitationTechnical Digest - International Electron Devices Meeting, IEDM, pp.1 - 1PublisherIEEE

SCIESCOPUS

Performance benchmarks for Si, III-V, TFET, and carbon nanotube FET - Re-thinking the technology assessment methodology for complementary logic applications Go to Link

Wei, Lan; Oh, Saeroonter; Wong, H.-S.Philip

ArticleIssue Date2010CitationTechnical Digest - International Electron Devices Meeting, IEDM, pp.1 - 4PublisherIEEE

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Browsing by Wong, H.-S.PhilipAuthor

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