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Functional level hot-patching platform for executable and linkable format binaries

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dc.contributor.authorJeong, Haegeon-
dc.contributor.authorBaik, Jeanseong-
dc.contributor.authorKang, Kyungtae-
dc.date.accessioned2021-06-22T15:24:50Z-
dc.date.available2021-06-22T15:24:50Z-
dc.date.issued2017-10-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/11694-
dc.description.abstractSoftware often requires frequent updates to improve performance and reliability. Typically, a general update process is performed after terminating a program although this is not applicable to applications that require non-disruptive services such as networks and satellites. In order to address this issue, network service providers often provide a technology termed as an in-service software upgrade that performs continual updates without stopping the services. However, it requires additional devices or facilities, and the system structure in this case becomes complicated and additional economic costs are incurred. In this study, the design and implementation of a functional-level hot-patching platform are presented for executable and linkable format binary program, based on an ARM and an Intel processor to add or update functions necessary to provide nonstop services. The proposed platform was validated on devices using both Raspberry Pi and a general x86_64 personal computer. Experiments with an iPerf3 server and a drone simulator on each device demonstrated the effectiveness of the proposed hot-patching platform in achieving non-disruptive services with a negligible latency of less than 10 ms. © 2017 IEEE.-
dc.format.extent6-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers Inc.-
dc.titleFunctional level hot-patching platform for executable and linkable format binaries-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/SMC.2017.8122653-
dc.identifier.scopusid2-s2.0-85044412626-
dc.identifier.wosid000427598700086-
dc.identifier.bibliographicCitation2017 IEEE International Conference on Systems, Man, and Cybernetics, SMC 2017, pp 489 - 494-
dc.citation.title2017 IEEE International Conference on Systems, Man, and Cybernetics, SMC 2017-
dc.citation.startPage489-
dc.citation.endPage494-
dc.type.docTypeConference Paper-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassother-
dc.relation.journalResearchAreaComputer Science-
dc.relation.journalWebOfScienceCategoryComputer Science, Artificial Intelligence-
dc.relation.journalWebOfScienceCategoryComputer Science, Cybernetics-
dc.subject.keywordPlusCybernetics-
dc.subject.keywordPlusPersonal computers-
dc.subject.keywordPlusProgram processors-
dc.subject.keywordPlusSoftware reliability-
dc.subject.keywordPlusDesign and implementations-
dc.subject.keywordPlusFunctional levels-
dc.subject.keywordPlusImprove performance-
dc.subject.keywordPlusIntel processors-
dc.subject.keywordPlusNetwork service providers-
dc.subject.keywordPlusNon-stop service-
dc.subject.keywordPlusService softwares-
dc.subject.keywordPlusSystem structures-
dc.subject.keywordPlusApplication programs-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8122653/-
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ERICA 소프트웨어융합대학 (DEPARTMENT OF ARTIFICIAL INTELLIGENCE)
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