Optimal Parallelization of Single Multi-Segment Real-Time Tasks for Global EDF
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Cho, Youngeun | - |
dc.contributor.author | Kim, Do Hyung | - |
dc.contributor.author | Park, Daechul | - |
dc.contributor.author | Lee, Seung Su | - |
dc.contributor.author | Lee, Chang-Gun | - |
dc.date.accessioned | 2024-01-19T08:00:24Z | - |
dc.date.available | 2024-01-19T08:00:24Z | - |
dc.date.issued | 2022-05 | - |
dc.identifier.issn | 0018-9340 | - |
dc.identifier.issn | 1557-9956 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/117789 | - |
dc.description.abstract | Targeting global EDF scheduling, this article proposes an optimal algorithm for parallelizing tasks with parallelization freedom. For this, we extend the interference-based sufficient schedulability analysis and derive monotonic increasing properties of both tolerance and interference for the schedulability. Leveraging those properties, we propose a one-way search-based optimal algorithm with polynomial time complexity. We present a formal proof of the optimality of the proposed algorithm. We first address the single-segment task model and then extend to the multi-segment task model. Our extensive experiments through both simulation and actual implementation show that our proposed approach can significantly improve the schedulability. © 1968-2012 IEEE. | - |
dc.format.extent | 9015 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.title | Optimal Parallelization of Single Multi-Segment Real-Time Tasks for Global EDF | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TC.2021.3071730 | - |
dc.identifier.scopusid | 2-s2.0-85104174392 | - |
dc.identifier.wosid | 000778905700007 | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Computers, v.71, no.5, pp 1077 - 10091 | - |
dc.citation.title | IEEE Transactions on Computers | - |
dc.citation.volume | 71 | - |
dc.citation.number | 5 | - |
dc.citation.startPage | 1077 | - |
dc.citation.endPage | 10091 | - |
dc.type.docType | 정기학술지(Article(Perspective Article포함)) | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Computer Science | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Computer Science, Hardware & Architecture | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | SCHEDULABILITY ANALYSIS | - |
dc.subject.keywordPlus | SYSTEMS | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | SETS | - |
dc.subject.keywordAuthor | optimal parallelization | - |
dc.subject.keywordAuthor | Parallelization freedom | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/9399273?arnumber=9399273&SID=EBSCO:edseee | - |
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