Hardware and Software Co-Simulation Methodology for Processing-in-Memory Bitcell application

Abstract

This paper proposes a reliable design methodology for processing-in-memory (PIM) Macro design. Instead of focusing on neural network training and inferencing in full precision, whether deep neural network (DNN) or convolutional neural network (CNN), we present an efficient and accurate performance evaluation methodology through simulation that considers the characteristics of actual bitcells in use. Additionally, we suggest necessary hardware design constraints to achieve high accuracy. © 2024 IEEE.