Automatic Tuning of Negative-R Circuit for High-Performance 95-dB DR 5-kHz Bandwidth Continuous-Time Delta-Sigma Modulator
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, Hwaseong | - |
dc.contributor.author | Song, Seokjae | - |
dc.contributor.author | Jeong, Hyunji | - |
dc.contributor.author | Duan, Quanzhen | - |
dc.contributor.author | Roh, Jeongjin | - |
dc.date.accessioned | 2024-05-02T00:00:23Z | - |
dc.date.available | 2024-05-02T00:00:23Z | - |
dc.date.issued | 2024-04 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.issn | 1558-0806 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/118907 | - |
dc.description.abstract | This paper presents a continuous-time delta-sigma modulator (CTDSM) for applications that require a 5-kHz signal band and high resolution. The number of applications that use negative-R to compensate for the DC-gain, unity gain bandwidth (UGB), and noise of operational amplifiers (op-amps) is increasing. However, due to process-voltage-temperature (PVT) variations, conventional negative-R has limitations in providing ideal compensation. Therefore, this paper presents an auto-tuning (AT) negative-R that can automatically calibrate for PVT variations, overcoming the limitations caused by mismatching issues in conventional negative-R. The proposed single-bit 3rd-order CTDSM applies AT negative-R to the first integrator, resulting in consistent and optimal integrator performance. The designed CTDSM was successfully fabricated in a 28-nm CMOS process and achieved the following measurement results: a peak signal-to-noise ratio (SNR) of 92.41 dB, a peak signal-to-noise and distortion ratio (SNDR) of 90.91 dB, a dynamic range (DR) of 95 dB, total power consumption of 24 mu W (at a supply voltage of 1 V), and a signal bandwidth of 5 kHz. | - |
dc.format.extent | 10 | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Institute of Electrical and Electronics Engineers | - |
dc.title | Automatic Tuning of Negative-R Circuit for High-Performance 95-dB DR 5-kHz Bandwidth Continuous-Time Delta-Sigma Modulator | - |
dc.type | Article | - |
dc.publisher.location | 미국 | - |
dc.identifier.doi | 10.1109/TCSI.2024.3383455 | - |
dc.identifier.scopusid | 2-s2.0-85190345112 | - |
dc.identifier.wosid | 001201949600001 | - |
dc.identifier.bibliographicCitation | IEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.6, pp 1 - 10 | - |
dc.citation.title | IEEE Transactions on Circuits and Systems I: Regular Papers | - |
dc.citation.volume | 71 | - |
dc.citation.number | 6 | - |
dc.citation.startPage | 1 | - |
dc.citation.endPage | 10 | - |
dc.type.docType | Article; Early Access | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.subject.keywordPlus | OPAMP | - |
dc.subject.keywordAuthor | Continuous-time delta-sigma modulator | - |
dc.subject.keywordAuthor | chopped negative-R | - |
dc.subject.keywordAuthor | auto-tuning | - |
dc.subject.keywordAuthor | analog-to-digital converter | - |
dc.subject.keywordAuthor | duty-cycle resistor | - |
dc.identifier.url | https://ieeexplore.ieee.org/document/10497177 | - |
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
55 Hanyangdeahak-ro, Sangnok-gu, Ansan, Gyeonggi-do, 15588, Korea+82-31-400-4269 sweetbrain@hanyang.ac.kr
COPYRIGHT © 2021 HANYANG UNIVERSITY. ALL RIGHTS RESERVED.
Certain data included herein are derived from the © Web of Science of Clarivate Analytics. All rights reserved.
You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.