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Automatic Tuning of Negative-R Circuit for High-Performance 95-dB DR 5-kHz Bandwidth Continuous-Time Delta-Sigma Modulator

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dc.contributor.authorShin, Hwaseong-
dc.contributor.authorSong, Seokjae-
dc.contributor.authorJeong, Hyunji-
dc.contributor.authorDuan, Quanzhen-
dc.contributor.authorRoh, Jeongjin-
dc.date.accessioned2024-05-02T00:00:23Z-
dc.date.available2024-05-02T00:00:23Z-
dc.date.issued2024-04-
dc.identifier.issn1549-8328-
dc.identifier.issn1558-0806-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/118907-
dc.description.abstractThis paper presents a continuous-time delta-sigma modulator (CTDSM) for applications that require a 5-kHz signal band and high resolution. The number of applications that use negative-R to compensate for the DC-gain, unity gain bandwidth (UGB), and noise of operational amplifiers (op-amps) is increasing. However, due to process-voltage-temperature (PVT) variations, conventional negative-R has limitations in providing ideal compensation. Therefore, this paper presents an auto-tuning (AT) negative-R that can automatically calibrate for PVT variations, overcoming the limitations caused by mismatching issues in conventional negative-R. The proposed single-bit 3rd-order CTDSM applies AT negative-R to the first integrator, resulting in consistent and optimal integrator performance. The designed CTDSM was successfully fabricated in a 28-nm CMOS process and achieved the following measurement results: a peak signal-to-noise ratio (SNR) of 92.41 dB, a peak signal-to-noise and distortion ratio (SNDR) of 90.91 dB, a dynamic range (DR) of 95 dB, total power consumption of 24 mu W (at a supply voltage of 1 V), and a signal bandwidth of 5 kHz.-
dc.format.extent10-
dc.language영어-
dc.language.isoENG-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.titleAutomatic Tuning of Negative-R Circuit for High-Performance 95-dB DR 5-kHz Bandwidth Continuous-Time Delta-Sigma Modulator-
dc.typeArticle-
dc.publisher.location미국-
dc.identifier.doi10.1109/TCSI.2024.3383455-
dc.identifier.scopusid2-s2.0-85190345112-
dc.identifier.wosid001201949600001-
dc.identifier.bibliographicCitationIEEE Transactions on Circuits and Systems I: Regular Papers, v.71, no.6, pp 1 - 10-
dc.citation.titleIEEE Transactions on Circuits and Systems I: Regular Papers-
dc.citation.volume71-
dc.citation.number6-
dc.citation.startPage1-
dc.citation.endPage10-
dc.type.docTypeArticle; Early Access-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusOPAMP-
dc.subject.keywordAuthorContinuous-time delta-sigma modulator-
dc.subject.keywordAuthorchopped negative-R-
dc.subject.keywordAuthorauto-tuning-
dc.subject.keywordAuthoranalog-to-digital converter-
dc.subject.keywordAuthorduty-cycle resistor-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/10497177-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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