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Fault Coverage Re-Evaluation of Memory Test Algorithms with Physical Memory Characteristicsopen access

Authors
Lee, KiseokKim, JeonghwanBaeg, Sanghyeon
Issue Date
Sep-2021
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
address scrambling; electrical masking; electrical neighborhood; Fault coverage (FC) re-evaluation; memory fault model (FM)
Citation
IEEE Access, v.9, pp 124632 - 124639
Pages
8
Indexed
SCIE
SCOPUS
Journal Title
IEEE Access
Volume
9
Start Page
124632
End Page
124639
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/120583
DOI
10.1109/ACCESS.2021.3110594
ISSN
2169-3536
Abstract
A memory fault model (FM) is an abstraction of the physical mechanism of memory failure. When the physical failure mechanisms are not fully represented in FMs, the coverage of the FMs can be different from that of the failure mechanisms. However, it is impractical (or impossible) to model every electrical aspect of the failure mechanisms with one or more FMs. This problem has become even worse with emerging technologies. Thus, in this study, the fault coverage (FC) consequences are investigated when the physical memory characteristics are not properly linked to the FMs or even test algorithms. Three physical characteristics were considered for this exploration: electrical masking, address scrambling, and electrical neighborhoods. To this end, memory fault simulations were performed, and the test algorithms were re-evaluated in terms of FC. Simulations were performed on the 1 kB area of the example SRAM model; three classes of FMs (56 static faults (SFs), 126 dynamic faults (DFs), and 192 neighborhood pattern-sensitive faults (NPSFs)) were simulated for FC evaluation; and March MSS, March MD2, and March 12N were used to re-evaluate the FCs of SFs, DFs, and NPSFs, respectively. From the simulation results, we observed the negative impact of physical characteristics on FC. When masking was considered, FC reductions of 10.72% SFs and 9.52% DFs were observed; when address scrambling was not available, an FC reduction of 80.21% NPSFs was observed. Finally, considering electrical neighborhood changes depending on the physical memory structure, an FC reduction of 41.67% NPSFs was observed. © 2013 IEEE.
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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