Insertion loss and polarization-dependent loss measurement improvement to enable parallel silicon photonics wafer-level testing
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Daehong | - |
dc.contributor.author | De Coster, Jeroen | - |
dc.contributor.author | Van Campenhout, Joris | - |
dc.contributor.author | Ban, Yoojin | - |
dc.contributor.author | Velenis, Dimitrios | - |
dc.contributor.author | Sar, Huseyin | - |
dc.contributor.author | Kobbi, Hakim | - |
dc.contributor.author | Magdziak, Rafal | - |
dc.contributor.author | Kim, Younghyun | - |
dc.date.accessioned | 2024-12-26T05:30:22Z | - |
dc.date.available | 2024-12-26T05:30:22Z | - |
dc.date.issued | 2025-03 | - |
dc.identifier.issn | 0143-8166 | - |
dc.identifier.issn | 1873-0302 | - |
dc.identifier.uri | https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/121416 | - |
dc.description.abstract | We propose a measurement system that enables the rapid measurement of insertion loss and polarization-dependent loss using a parallel test setup with a fiber array, and the calibration procedure to be used within this system. By applying rough scan methods, we have developed a calibration algorithm that efficiently finds the accurately optimized state of polarization in minimal time. Through conducting on-wafer spectral optical power measurements, we compared conventional applications and our proposed algorithms. The results demonstrate that our method enables the almost simultaneous measurement of the spectral responses of multiple optical components. Moreover, the method enables to measure these responses with a well-defined input state of polarization (SOP) applied to each path individually. This novel approach holds promise for enhancing accuracy and cost-effectiveness in insertion loss and polarization-dependent loss measurements. © 2024 Elsevier Ltd | - |
dc.language | 영어 | - |
dc.language.iso | ENG | - |
dc.publisher | Elsevier Ltd | - |
dc.title | Insertion loss and polarization-dependent loss measurement improvement to enable parallel silicon photonics wafer-level testing | - |
dc.type | Article | - |
dc.publisher.location | 영국 | - |
dc.identifier.doi | 10.1016/j.optlaseng.2024.108742 | - |
dc.identifier.scopusid | 2-s2.0-85211145371 | - |
dc.identifier.wosid | 001374933800001 | - |
dc.identifier.bibliographicCitation | Optics and Lasers in Engineering, v.186 | - |
dc.citation.title | Optics and Lasers in Engineering | - |
dc.citation.volume | 186 | - |
dc.type.docType | Article | - |
dc.description.isOpenAccess | N | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Optics | - |
dc.relation.journalWebOfScienceCategory | Optics | - |
dc.subject.keywordPlus | BIREFRINGENCE | - |
dc.subject.keywordAuthor | IL | - |
dc.subject.keywordAuthor | Parallel test | - |
dc.subject.keywordAuthor | PDL | - |
dc.subject.keywordAuthor | Si photonics | - |
dc.subject.keywordAuthor | SOP | - |
dc.subject.keywordAuthor | Wafer testing | - |
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