A Case Study of JTAG Interface Connection Failure in FPGA System Caused by SMT Defect

Abstract

A FPGA is broadly used because of its high flexibility and high performance. This paper describes the diagnosis procedure when the FPGA system cannot connect with JTAG Interface; i) the JTAG Programmer and related circuit on the system, ii) the PFGA Configuration circuit, iii) the power status for the FPGA. iv) the SMT defect with the PCB and the FPGA, v) the bug and defect of FPGA Software or the FPGA chip. With this procedure the author succeeded to find out the SMT defect was the cause of the connection failure.