Analysis of Flow and Pressure Loss Characteristics in a Semiconductor Chip Test Chamber

Abstract

The performance of the semiconductor chip is affected by temperature changes. In order to test the performance of the semiconductor chip according to the temperature change, the temperature inside the test chamber should be uniformly maintained. The airflow distribution inside t he test chamber is very important to control the temperature variation range. Numerical analysis was carried out to investigate the influence internal airflow distribution and pressure characteristics of the semiconductor chip test chamber, and the charact eristics of internal flow and pressure loss were analyzed. As a governing equation of numerical analysis, a three dimensional steady state Reynolds averaged Navier Stoked (RANS) equation was applied with the shear stress transport (SST) k ω turbulence mode l. The heater, the test chip module and the heat exchanger through with the flow passes in the test chamber are simplified with a porous media. The Darcy’s law equation was applied to simu l ate fluid flow in porous media. In order to select the appropriate porosity of the components in the chamber, the pressure drop test was performed according to the flow rate. The selected porosities were applied to each component to analyze the flow inside the chamber, and the flow characteristics and pressure loss charac teristics were examined. The flow inside the chamber is not uniformly distributed to the chip test region. In order to make the uniform distribution of the airflow passing through the chip test module, small fan arrays were suggested and the selection meth od of the small fans with different positions was discussed and analyzed