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A 1.2-V 4.2-ppm/degrees C High-Order Curvature-Compensated CMOS Bandgap Reference

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dc.contributor.authorDuan, Quanzhen-
dc.contributor.authorRoh, Jeongjin-
dc.date.accessioned2021-06-22T20:23:42Z-
dc.date.available2021-06-22T20:23:42Z-
dc.date.created2021-01-21-
dc.date.issued2015-03-
dc.identifier.issn1549-8328-
dc.identifier.urihttps://scholarworks.bwise.kr/erica/handle/2021.sw.erica/18819-
dc.description.abstractThis study presents a high-precision CMOS bandgap reference (BGR) circuit with low supply voltage. The proposed BGR circuit consists of two BGR cores and a curvature correction circuit, which includes a current mirror and a summing circuit. Two BGR cores adopt conventional structures with the curvature-down characteristics. A current-mirror circuit is proposed to implement one of the BGR cores to have the curvature-up characteristic. Selection of the appropriate resistances in the BGR cores results in one reference voltage with a well balanced curvature-down characteristic and another reference voltage with an evenly balanced curvature-up characteristic. The summation of these reference voltages is proposed to achieve a high-order curvature compensation. This curvature correction circuit causes the proposed BGR circuit without any trimming to show a measured temperature coefficient (TC) as low as 4.2 ppm/degrees C over a wide temperature range of 160 degrees C (-40 similar to 120 degrees C) at a power supply voltage of 1.2 V. The average TC for 8 random samples is approximately 9.3 ppm/degrees C. The measured power-supply rejection ratio (PSRR) of -30 dB is achieved at the frequency of 100 kHz. The total chip size is 0.063mm(2) with a standard 0.13-mu m CMOS process.-
dc.language영어-
dc.language.isoen-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA 1.2-V 4.2-ppm/degrees C High-Order Curvature-Compensated CMOS Bandgap Reference-
dc.typeArticle-
dc.contributor.affiliatedAuthorRoh, Jeongjin-
dc.identifier.doi10.1109/TCSI.2014.2374832-
dc.identifier.scopusid2-s2.0-85027949047-
dc.identifier.wosid000350799100006-
dc.identifier.bibliographicCitationIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.3, pp.662 - 670-
dc.relation.isPartOfIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS-
dc.citation.titleIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS-
dc.citation.volume62-
dc.citation.number3-
dc.citation.startPage662-
dc.citation.endPage670-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.description.journalClass1-
dc.description.isOpenAccessN-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.relation.journalResearchAreaEngineering-
dc.relation.journalWebOfScienceCategoryEngineering, Electrical & Electronic-
dc.subject.keywordPlusTHRESHOLD VOLTAGE-
dc.subject.keywordPlusSUB-1-V OPERATION-
dc.subject.keywordPlusCIRCUITS-
dc.subject.keywordAuthorBandgap reference-
dc.subject.keywordAuthorhigh-order curvature compensation-
dc.subject.keywordAuthorhigh-precision-
dc.subject.keywordAuthorlow voltage-
dc.subject.keywordAuthortemperature coefficient-
dc.identifier.urlhttps://ieeexplore.ieee.org/document/6999965-
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ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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